arch/arm64/boot/dts/rockchip/rk3588-jaguar-pre-ict-tester.dtso

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/rockchip/rk3588-jaguar-pre-ict-tester.dtso

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/rockchip/rk3588-jaguar-pre-ict-tester.dtso
Extension
.dtso
Size
5955 bytes
Lines
172
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: arch/arm64
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
 * Copyright (c) 2024 Cherry Embedded Solutions GmbH
 *
 * Device Tree Overlay for the Pre-ICT tester adapter for the Mezzanine
 * connector on RK3588 Jaguar.
 *
 * This adapter has a PCIe Gen2 x1 M.2 M-Key connector and two proprietary
 * camera connectors (each their own I2C bus, clock, reset and PWM lines as well
 * as 2-lane CSI).
 *
 * This adapter routes some GPIOs to power rails and loops together some other
 * GPIOs.
 *
 * This adapter is used during manufacturing for validating proper soldering of
 * the mezzanine connector.
 */

/dts-v1/;
/plugin/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>

&{/} {
	pre_ict_tester_vcc_1v2: regulator-pre-ict-tester-vcc-1v2 {
		compatible = "regulator-fixed";
		regulator-name = "pre_ict_tester_vcc_1v2";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <1200000>;
		regulator-max-microvolt = <1200000>;
		vin-supply = <&vcc_3v3_s3>;
	};

	pre_ict_tester_vcc_2v8: regulator-pre-ict-tester-vcc-2v8 {
		compatible = "regulator-fixed";
		regulator-name = "pre_ict_tester_vcc_2v8";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <2800000>;
		regulator-max-microvolt = <2800000>;
		vin-supply = <&vcc_3v3_s3>;
	};
};

&combphy0_ps {
	status = "okay";
};

&gpio3 {
	pinctrl-0 = <&pre_ict_pwr2gpio>;
	pinctrl-names = "default";
};

&pcie2x1l2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pcie2x1l2_perstn_m0>;
	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; /* PCIE20X1_2_PERSTN_M0 */
	vpcie3v3-supply = <&vcc_3v3_s3>;
	status = "okay";
};

&pinctrl {
	pcie2x1l2 {
		pcie2x1l2_perstn_m0: pcie2x1l2-perstn-m0 {
			rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};

Annotation

Implementation Notes