arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dts
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dts- Extension
.dts- Size
- 569 bytes
- Lines
- 22
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
rk3588-turing-rk1.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* This device tree covers the common case where the RK1 is used as a
* "compute node" system, where the carrier board is functioning more like a
* generic backplane (with no non-autoenumerable peripherals of its own) than
* like a device that the SoM is meant to enable.
*
* Copyright (c) 2023 Sam Edwards <CFSworks@gmail.com>
*/
/dts-v1/;
#include "rk3588-turing-rk1.dtsi"
/ {
model = "Turing Machines RK1";
compatible = "turing,rk1", "rockchip,rk3588";
chosen {
stdout-path = "serial9:115200n8";
};
};
Annotation
- Immediate include surface: `rk3588-turing-rk1.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.