arch/arm64/boot/dts/st/stm32mp233.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/st/stm32mp233.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/st/stm32mp233.dtsi- Extension
.dtsi- Size
- 2267 bytes
- Lines
- 95
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
stm32mp231.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
/*
* Copyright (C) STMicroelectronics 2025 - All Rights Reserved
* Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
*/
#include "stm32mp231.dtsi"
/ {
cpus {
cpu1: cpu@1 {
compatible = "arm,cortex-a35";
reg = <1>;
device_type = "cpu";
enable-method = "psci";
power-domains = <&cpu1_pd>;
power-domain-names = "psci";
};
};
arm-pmu {
interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>;
};
psci {
cpu1_pd: power-domain-cpu1 {
#power-domain-cells = <0>;
power-domains = <&cluster_pd>;
};
};
timer {
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
};
&optee {
interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
&rifsc {
ethernet2: ethernet@482d0000 {
compatible = "st,stm32mp25-dwmac", "snps,dwmac-5.20";
reg = <0x482d0000 0x4000>;
reg-names = "stmmaceth";
interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
clock-names = "stmmaceth",
"mac-clk-tx",
"mac-clk-rx",
"ptp_ref",
"ethstp",
"eth-ck";
clocks = <&rcc CK_ETH2_MAC>,
<&rcc CK_ETH2_TX>,
<&rcc CK_ETH2_RX>,
<&rcc CK_KER_ETH2PTP>,
<&rcc CK_ETH2_STP>,
<&rcc CK_KER_ETH2>;
snps,axi-config = <&stmmac_axi_config_2>;
snps,mixed-burst;
snps,mtl-rx-config = <&mtl_rx_setup_2>;
snps,mtl-tx-config = <&mtl_tx_setup_2>;
snps,pbl = <2>;
snps,tso;
st,syscon = <&syscfg 0x3400>;
Annotation
- Immediate include surface: `stm32mp231.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.