arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
Extension
.dtsi
Size
15834 bytes
Lines
596
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
/*
 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
 */
#include <dt-bindings/pinctrl/stm32-pinfunc.h>

&pinctrl {
	/omit-if-no-ref/
	eth1_mdio_pins_a: eth1-mdio-0 {
		pins1 {
			pinmux = <STM32_PINMUX('F', 0, AF10)>; /* ETH_MDC */
			bias-disable;
			drive-push-pull;
			slew-rate = <2>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('F', 2, AF10)>; /* ETH_MDIO */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
	};

	/omit-if-no-ref/
	eth1_mdio_sleep_pins_a: eth1-mdio-sleep-0 {
		pins1 {
			pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* ETH_MDC */
				 <STM32_PINMUX('F', 2, ANALOG)>; /* ETH_MDIO */
		};
	};

	/omit-if-no-ref/
	eth1_rgmii_pins_a: eth1-rgmii-0 {
		pins1 {
			pinmux = <STM32_PINMUX('A', 15, AF10)>, /* ETH_RGMII_TXD0 */
				 <STM32_PINMUX('C', 1, AF10)>, /* ETH_RGMII_TXD1 */
				 <STM32_PINMUX('H', 10, AF10)>, /* ETH_RGMII_TXD2 */
				 <STM32_PINMUX('H', 11, AF10)>, /* ETH_RGMII_TXD3 */
				 <STM32_PINMUX('A', 13, AF10)>; /* ETH_RGMII_TX_CTL */
			bias-disable;
			drive-push-pull;
			slew-rate = <3>;
			st,io-sync = "data on both edges";
		};
		pins2 {
			pinmux = <STM32_PINMUX('H', 9, AF10)>, /* ETH_RGMII_CLK125 */
				 <STM32_PINMUX('C', 0, AF12)>; /* ETH_RGMII_GTX_CLK */
			bias-disable;
			drive-push-pull;
			slew-rate = <3>;
		};
		pins3 {
			pinmux = <STM32_PINMUX('F', 1, AF10)>, /* ETH_RGMII_RXD0 */
				 <STM32_PINMUX('C', 2, AF10)>, /* ETH_RGMII_RXD1 */
				 <STM32_PINMUX('H', 12, AF10)>, /* ETH_RGMII_RXD2 */
				 <STM32_PINMUX('H', 13, AF10)>, /* ETH_RGMII_RXD3 */
				 <STM32_PINMUX('A', 11, AF10)>; /* ETH_RGMII_RX_CTL */
			bias-disable;
			st,io-sync = "data on both edges";
		};
		pins4 {
			pinmux = <STM32_PINMUX('A', 14, AF10)>; /* ETH_RGMII_RX_CLK */
			bias-disable;
		};
	};

	/omit-if-no-ref/
	eth1_rgmii_sleep_pins_a: eth1-rgmii-sleep-0 {
		pins {

Annotation

Implementation Notes