arch/arm64/boot/dts/st/stm32mp251.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/st/stm32mp251.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/st/stm32mp251.dtsi- Extension
.dtsi- Size
- 60692 bytes
- Lines
- 2223
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
Dependency Surface
dt-bindings/clock/st,stm32mp25-rcc.hdt-bindings/interrupt-controller/arm-gic.hdt-bindings/reset/st,stm32mp25-rcc.hdt-bindings/regulator/st,stm32mp25-regulator.hdt-bindings/phy/phy.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
/*
* Copyright (C) STMicroelectronics 2023 - All Rights Reserved
* Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
*/
#include <dt-bindings/clock/st,stm32mp25-rcc.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/st,stm32mp25-rcc.h>
#include <dt-bindings/regulator/st,stm32mp25-regulator.h>
#include <dt-bindings/phy/phy.h>
/ {
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "arm,cortex-a35";
device_type = "cpu";
reg = <0>;
enable-method = "psci";
power-domains = <&CPU_PD0>;
power-domain-names = "psci";
};
};
arm-pmu {
compatible = "arm,cortex-a35-pmu";
interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>;
interrupt-parent = <&intc>;
};
arm_wdt: watchdog {
compatible = "arm,smc-wdt";
arm,smc-id = <0xb200005a>;
status = "disabled";
};
clocks {
clk_dsi_txbyte: txbyteclk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <0>;
};
clk_rcbsec: clk-rcbsec {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <64000000>;
};
clk_flexgen_27_fixed: clk-54000000 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <54000000>;
};
};
firmware {
optee: optee {
compatible = "linaro,optee-tz";
method = "smc";
interrupt-parent = <&intc>;
interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
};
Annotation
- Immediate include surface: `dt-bindings/clock/st,stm32mp25-rcc.h`, `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/reset/st,stm32mp25-rcc.h`, `dt-bindings/regulator/st,stm32mp25-regulator.h`, `dt-bindings/phy/phy.h`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.