arch/arm64/boot/dts/ti/k3-am62l-main.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/ti/k3-am62l-main.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/ti/k3-am62l-main.dtsi
Extension
.dtsi
Size
16110 bytes
Lines
588
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only or MIT
/*
 * Device Tree file for the AM62L main domain peripherals
 * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
 *
 * Technical Reference Manual: https://www.ti.com/lit/pdf/sprujb4
 */

&cbass_main {
	gic500: interrupt-controller@1800000 {
		compatible = "arm,gic-v3";
		reg = <0x00 0x01800000 0x00 0x10000>,	/* GICD */
		      <0x00 0x01840000 0x00 0xc0000>,	/* GICR */
		      <0x01 0x00000000 0x00 0x2000>,    /* GICC */
		      <0x01 0x00010000 0x00 0x1000>,    /* GICH */
		      <0x01 0x00020000 0x00 0x2000>;    /* GICV */
		ranges;
		#address-cells = <2>;
		#size-cells = <2>;
		#interrupt-cells = <3>;
		interrupt-controller;
		/*
		 * vcpumntirq:
		 * virtual CPU interface maintenance interrupt
		 */
		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;

		gic_its: msi-controller@1820000 {
			compatible = "arm,gic-v3-its";
			reg = <0x00 0x01820000 0x00 0x10000>;
			socionext,synquacer-pre-its = <0x1000000 0x400000>;
			msi-controller;
			#msi-cells = <1>;
		};
	};

	gpio0: gpio@600000 {
		compatible = "ti,am64-gpio", "ti,keystone-gpio";
		reg = <0x00 0x00600000 0x00 0x100>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-parent = <&gic500>;
		interrupts = <GIC_SPI 260 IRQ_TYPE_EDGE_RISING>,
			     <GIC_SPI 261 IRQ_TYPE_EDGE_RISING>,
			     <GIC_SPI 262 IRQ_TYPE_EDGE_RISING>,
			     <GIC_SPI 263 IRQ_TYPE_EDGE_RISING>,
			     <GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
			     <GIC_SPI 265 IRQ_TYPE_EDGE_RISING>,
			     <GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
			     <GIC_SPI 267 IRQ_TYPE_EDGE_RISING>;
		interrupt-controller;
		#interrupt-cells = <2>;
		power-domains = <&scmi_pds 34>;
		clocks = <&scmi_clk 140>;
		clock-names = "gpio";
		ti,ngpio = <126>;
		ti,davinci-gpio-unbanked = <0>;
	};

	gpio2: gpio@610000 {
		compatible = "ti,am64-gpio", "ti,keystone-gpio";
		reg = <0x00 0x00610000 0x00 0x100>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-parent = <&gic500>;
		interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>,
			     <GIC_SPI 281 IRQ_TYPE_EDGE_RISING>,
			     <GIC_SPI 282 IRQ_TYPE_EDGE_RISING>,
			     <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>,
			     <GIC_SPI 284 IRQ_TYPE_EDGE_RISING>,

Annotation

Implementation Notes