arch/arm64/boot/dts/ti/k3-am62l-wakeup.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/ti/k3-am62l-wakeup.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/ti/k3-am62l-wakeup.dtsi- Extension
.dtsi- Size
- 3923 bytes
- Lines
- 147
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/bus/ti-sysc.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only or MIT
/*
* Device Tree file for the AM62L wakeup domain peripherals
* Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
*
* Technical Reference Manual: https://www.ti.com/lit/pdf/sprujb4
*/
#include <dt-bindings/bus/ti-sysc.h>
&cbass_wakeup {
vtm0: temperature-sensor@b00000 {
compatible = "ti,j7200-vtm";
reg = <0x00 0xb00000 0x00 0x400>,
<0x00 0xb01000 0x00 0x400>;
power-domains = <&scmi_pds 46>;
#thermal-sensor-cells = <1>;
};
pmx0: pinctrl@4084000 {
compatible = "ti,am62l-padconf", "pinctrl-single";
reg = <0x00 0x4084000 0x00 0x24c>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xffffffff>;
#pinctrl-cells = <1>;
};
wkup_gpio0: gpio@4201000 {
compatible = "ti,am64-gpio", "ti,keystone-gpio";
reg = <0x00 0x04201000 0x00 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&gic500>;
interrupts = <GIC_SPI 276 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 704 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 705 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 706 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 707 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 708 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 709 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 710 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
power-domains = <&scmi_pds 36>;
clocks = <&scmi_clk 146>;
clock-names = "gpio";
ti,ngpio = <7>;
ti,davinci-gpio-unbanked = <0>;
status = "disabled";
};
wkup_timer0: timer@2b100000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2b100000 0x00 0x400>;
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scmi_clk 93>;
clock-names = "fck";
power-domains = <&scmi_pds 19>;
ti,timer-pwm;
};
wkup_timer1: timer@2b110000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2b110000 0x00 0x400>;
interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scmi_clk 98>;
clock-names = "fck";
power-domains = <&scmi_pds 20>;
ti,timer-pwm;
};
Annotation
- Immediate include surface: `dt-bindings/bus/ti-sysc.h`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.