arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtso
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtso
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtso- Extension
.dtso- Size
- 1487 bytes
- Lines
- 64
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: arch/arm64
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
k3-pinctrl.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
* Copyright (C) 2025 PHYTEC Messtechnik GmbH
* Authors:
* Wadim Egorov <w.egorov@phytec.de>
* Daniel Schultz <d.schultz@phytec.de>
*
* GPIO, SPI and UART examples for the X27 expansion connector.
*/
/dts-v1/;
/plugin/;
#include "k3-pinctrl.h"
&{/} {
aliases {
serial5 = "/bus@f4000/serial@2830000";
};
};
&main_pmx0 {
main_gpio1_exp_header_gpio_pins_default: main-gpio1-exp-header-gpio-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0220, PIN_INPUT, 7) /* (D14) SPI1_CS1.GPIO1_48 */
>;
};
main_spi1_pins_default: main-spi1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0224, PIN_INPUT, 0) /* (C14) SPI1_CLK */
AM64X_IOPAD(0x021c, PIN_OUTPUT, 0) /* (B14) SPI1_CS0 */
AM64X_IOPAD(0x0228, PIN_OUTPUT, 0) /* (B15) SPI1_D0 */
AM64X_IOPAD(0x022c, PIN_INPUT, 0) /* (A15) SPI1_D1 */
>;
};
main_uart3_pins_default: main-uart3-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0048, PIN_INPUT, 2) /* (U20) GPMC0_AD3.UART3_RXD */
AM64X_IOPAD(0x004c, PIN_OUTPUT, 2) /* (U18) GPMC0_AD4.UART3_TXD */
>;
};
};
&main_gpio1 {
pinctrl-names = "default";
pinctrl-0 = <&main_gpio1_exp_header_gpio_pins_default>;
status = "okay";
};
&main_spi1 {
pinctrl-names = "default";
pinctrl-0 = <&main_spi1_pins_default>;
ti,pindir-d0-out-d1-in;
status = "okay";
};
&main_uart3 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart3_pins_default>;
status = "okay";
};
Annotation
- Immediate include surface: `k3-pinctrl.h`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.