arch/arm64/boot/dts/ti/k3-am65-main.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/ti/k3-am65-main.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/ti/k3-am65-main.dtsi
Extension
.dtsi
Size
45057 bytes
Lines
1617
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
 * Device Tree Source for AM6 SoC Family Main Domain peripherals
 *
 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
 */
#include <dt-bindings/phy/phy-am654-serdes.h>

&cbass_main {
	msmc_ram: sram@70000000 {
		compatible = "mmio-sram";
		reg = <0x0 0x70000000 0x0 0x200000>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x0 0x70000000 0x200000>;

		atf-sram@0 {
			reg = <0x0 0x20000>;
		};

		sysfw-sram@f0000 {
			reg = <0xf0000 0x10000>;
		};

		l3cache-sram@100000 {
			reg = <0x100000 0x100000>;
		};
	};

	gic500: interrupt-controller@1800000 {
		compatible = "arm,gic-v3";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0x00 0x01800000 0x00 0x10000>,	/* GICD */
		      <0x00 0x01880000 0x00 0x90000>,	/* GICR */
		      <0x00 0x6f000000 0x00 0x2000>,	/* GICC */
		      <0x00 0x6f010000 0x00 0x1000>,	/* GICH */
		      <0x00 0x6f020000 0x00 0x2000>;	/* GICV */
		/*
		 * vcpumntirq:
		 * virtual CPU interface maintenance interrupt
		 */
		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;

		gic_its: msi-controller@1820000 {
			compatible = "arm,gic-v3-its";
			reg = <0x00 0x01820000 0x00 0x10000>;
			socionext,synquacer-pre-its = <0x1000000 0x400000>;
			msi-controller;
			#msi-cells = <1>;
		};
	};

	main_esm: esm@700000 {
		compatible = "ti,j721e-esm";
		reg = <0x00 0x700000 0x00 0x1000>;
		bootph-pre-ram;
		/* Interrupt sources: rti0, rti1, rti2, rti3 */
		ti,esm-pins = <224>, <225>, <226>, <227>;
	};

	serdes0: serdes@900000 {
		compatible = "ti,phy-am654-serdes";
		reg = <0x0 0x900000 0x0 0x2000>;
		reg-names = "serdes";
		#phy-cells = <2>;
		power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;

Annotation

Implementation Notes