arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
Extension
.dtsi
Size
13052 bytes
Lines
465
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
 * Device Tree Source for AM6 SoC Family MCU Domain peripherals
 *
 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
 */

&cbass_mcu {
	mcu_conf: bus@40f00000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x0 0x40f00000 0x20000>;

		cpsw_mac_syscon: ethernet-mac-syscon@200 {
			compatible = "ti,am62p-cpsw-mac-efuse", "syscon";
			reg = <0x200 0x8>;
		};

		phy_gmii_sel: phy@4040 {
			compatible = "ti,am654-phy-gmii-sel";
			reg = <0x4040 0x4>;
			#phy-cells = <1>;
		};
	};

	/* MCU_TIMERIO pad input CTRLMMR_MCU_TIMER*_CTRL registers */
	mcu_timerio_input: pinctrl@40f04200 {
		compatible = "pinctrl-single";
		reg = <0x0 0x40f04200 0x0 0x10>;
		#pinctrl-cells = <1>;
		pinctrl-single,register-width = <32>;
		pinctrl-single,function-mask = <0x00000101>;
	};

	/* MCU_TIMERIO pad output CTRLMMR_MCU_TIMERIO*_CTRL registers */
	mcu_timerio_output: pinctrl@40f04280 {
		compatible = "pinctrl-single";
		reg = <0x0 0x40f04280 0x0 0x8>;
		#pinctrl-cells = <1>;
		pinctrl-single,register-width = <32>;
		pinctrl-single,function-mask = <0x00000003>;
	};

	mcu_uart0: serial@40a00000 {
		compatible = "ti,am654-uart";
		reg = <0x00 0x40a00000 0x00 0x100>;
		interrupts = <GIC_SPI 565 IRQ_TYPE_LEVEL_HIGH>;
		clock-frequency = <96000000>;
		power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
		status = "disabled";
	};

	mcu_ram: sram@41c00000 {
		compatible = "mmio-sram";
		reg = <0x00 0x41c00000 0x00 0x80000>;
		ranges = <0x0 0x00 0x41c00000 0x80000>;
		#address-cells = <1>;
		#size-cells = <1>;
	};

	mcu_i2c0: i2c@40b00000 {
		compatible = "ti,am654-i2c", "ti,omap4-i2c";
		reg = <0x0 0x40b00000 0x0 0x100>;
		interrupts = <GIC_SPI 564 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clock-names = "fck";
		clocks = <&k3_clks 114 1>;
		power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;

Annotation

Implementation Notes