arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso
Extension
.dtso
Size
5358 bytes
Lines
147
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: arch/arm64
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only OR MIT
/**
 * DT overlay for IDK application board on AM654 EVM
 *
 * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/
 */

/dts-v1/;
/plugin/;

#include <dt-bindings/net/ti-dp83867.h>
#include "k3-pinctrl.h"

&{/} {
	aliases {
		ethernet1 = "/icssg2-eth/ethernet-ports/port@0";
		ethernet2 = "/icssg2-eth/ethernet-ports/port@1";
	};

	/* Ethernet node on PRU-ICSSG2 */
	icssg2_eth: icssg2-eth {
		compatible = "ti,am654-icssg-prueth";
		pinctrl-names = "default";
		pinctrl-0 = <&icssg2_rgmii_pins_default>;
		sram = <&msmc_ram>;
		ti,prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>,
			<&pru2_1>, <&rtu2_1>, <&tx_pru2_1>;
		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,      /* MII mode */
				      <2>,
				      <2>,
				      <2>,	/* MII mode */
				      <2>,
				      <2>;

		ti,mii-g-rt = <&icssg2_mii_g_rt>;
		ti,mii-rt = <&icssg2_mii_rt>;
		ti,pa-stats = <&icssg2_pa_stats>;
		ti,iep = <&icssg2_iep0>, <&icssg2_iep1>;

		interrupt-parent = <&icssg2_intc>;
		interrupts = <24 0 2>, <25 1 3>;
		interrupt-names = "tx_ts0", "tx_ts1";

		dmas = <&main_udmap 0xc300>, /* egress slice 0 */
		       <&main_udmap 0xc301>, /* egress slice 0 */
		       <&main_udmap 0xc302>, /* egress slice 0 */
		       <&main_udmap 0xc303>, /* egress slice 0 */
		       <&main_udmap 0xc304>, /* egress slice 1 */
		       <&main_udmap 0xc305>, /* egress slice 1 */
		       <&main_udmap 0xc306>, /* egress slice 1 */
		       <&main_udmap 0xc307>, /* egress slice 1 */
		       <&main_udmap 0x4300>, /* ingress slice 0 */
		       <&main_udmap 0x4301>; /* ingress slice 1 */

		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
			    "rx0", "rx1";
		ethernet-ports {
			#address-cells = <1>;
			#size-cells = <0>;
			icssg2_emac0: port@0 {
				reg = <0>;
				phy-handle = <&icssg2_phy0>;

Annotation

Implementation Notes