arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso
Extension
.dtso
Size
1304 bytes
Lines
61
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: arch/arm64
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only OR MIT
/**
 * DT overlay for SERDES personality card: 2lane PCIe + USB2.0 Host on AM654 EVM
 *
 * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/
 */

/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/phy/phy-am654-serdes.h>
#include "k3-pinctrl.h"

&serdes0 {
	assigned-clocks = <&k3_clks 153 4>,
			  <&serdes0 AM654_SERDES_CMU_REFCLK>,
			  <&serdes0 AM654_SERDES_RO_REFCLK>;
	assigned-clock-parents = <&k3_clks 153 8>,
				 <&k3_clks 153 4>,
				 <&k3_clks 153 4>;
	status = "okay";
};

&serdes1 {
	assigned-clocks = <&serdes1 AM654_SERDES_CMU_REFCLK>;
	assigned-clock-parents = <&serdes0 AM654_SERDES_RO_REFCLK>;
	status = "okay";
};

&pcie0_rc {
	num-lanes = <2>;
	phys = <&serdes0 PHY_TYPE_PCIE 1>, <&serdes1 PHY_TYPE_PCIE 1>;
	phy-names = "pcie-phy0", "pcie-phy1";
	reset-gpios = <&pca9555 5 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&main_pmx0 {
       usb0_pins_default: usb0-default-pins {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
		>;
	};
};

&dwc3_0 {
	status = "okay";
	bootph-all;
};

&usb0_phy {
	status = "okay";
};

&usb0 {
	pinctrl-names = "default";
	pinctrl-0 = <&usb0_pins_default>;
	dr_mode = "host";
};

Annotation

Implementation Notes