arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts- Extension
.dts- Size
- 20069 bytes
- Lines
- 768
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
k3-j721e.dtsidt-bindings/gpio/gpio.hdt-bindings/input/input.hdt-bindings/leds/common.hdt-bindings/net/ti-dp83867.hdt-bindings/phy/phy-cadence.hk3-j721e-ti-ipc-firmware.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
* https://beagleboard.org/ai-64
* Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
* Copyright (C) 2022-2024 Jason Kridner, BeagleBoard.org Foundation
* Copyright (C) 2022-2024 Robert Nelson, BeagleBoard.org Foundation
*/
/dts-v1/;
#include "k3-j721e.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/phy/phy-cadence.h>
/ {
compatible = "beagle,j721e-beagleboneai64", "ti,j721e";
model = "BeagleBoard.org BeagleBone AI-64";
aliases {
serial0 = &wkup_uart0;
serial2 = &main_uart0;
mmc0 = &main_sdhci0;
mmc1 = &main_sdhci1;
i2c0 = &wkup_i2c0;
i2c1 = &main_i2c6;
i2c2 = &main_i2c2;
i2c3 = &main_i2c4;
};
chosen {
stdout-path = "serial2:115200n8";
};
memory@80000000 {
device_type = "memory";
/* 4G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
<0x00000008 0x80000000 0x00000000 0x80000000>;
};
reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
secure_ddr: optee@9e800000 {
reg = <0x00 0x9e800000 0x00 0x01800000>;
no-map;
};
mcu_r5fss0_core0_dma_memory_region: memory@a0000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa0000000 0x00 0x100000>;
no-map;
};
mcu_r5fss0_core0_memory_region: memory@a0100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
};
gpio_keys: gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&sw_pwr_pins_default>;
Annotation
- Immediate include surface: `k3-j721e.dtsi`, `dt-bindings/gpio/gpio.h`, `dt-bindings/input/input.h`, `dt-bindings/leds/common.h`, `dt-bindings/net/ti-dp83867.h`, `dt-bindings/phy/phy-cadence.h`, `k3-j721e-ti-ipc-firmware.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.