arch/arm64/boot/dts/ti/k3-j721e-main.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
Extension
.dtsi
Size
84056 bytes
Lines
2932
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
 * Device Tree Source for J721E SoC Family Main Domain peripherals
 *
 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
 */
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/phy/phy-ti.h>
#include <dt-bindings/mux/mux.h>

#include "k3-serdes.h"

/ {
	cmn_refclk: clock-cmnrefclk {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <0>;
	};

	cmn_refclk1: clock-cmnrefclk1 {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <0>;
	};
};

&cbass_main {
	msmc_ram: sram@70000000 {
		compatible = "mmio-sram";
		reg = <0x0 0x70000000 0x0 0x800000>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x0 0x70000000 0x800000>;

		atf-sram@0 {
			reg = <0x0 0x20000>;
		};
	};

	scm_conf: scm-conf@100000 {
		compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
		reg = <0 0x00100000 0 0x1c000>; /* excludes pinctrl region */
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x0 0x00100000 0x1c000>;

		pcie0_ctrl: pcie-ctrl@4070 {
			compatible = "ti,j784s4-pcie-ctrl", "syscon";
			reg = <0x4070 0x4>;
		};

		pcie1_ctrl: pcie-ctrl@4074 {
			compatible = "ti,j784s4-pcie-ctrl", "syscon";
			reg = <0x4074 0x4>;
		};

		pcie2_ctrl: pcie-ctrl@4078 {
			compatible = "ti,j784s4-pcie-ctrl", "syscon";
			reg = <0x4078 0x4>;
		};

		pcie3_ctrl: pcie-ctrl@407c {
			compatible = "ti,j784s4-pcie-ctrl", "syscon";
			reg = <0x407c 0x4>;
		};

		serdes_ln_ctrl: mux-controller@4080 {
			compatible = "reg-mux";
			reg = <0x4080 0x50>;
			#mux-control-cells = <1>;

Annotation

Implementation Notes