arch/arm64/boot/dts/xilinx/versal-net-clk.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/xilinx/versal-net-clk.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/xilinx/versal-net-clk.dtsi
Extension
.dtsi
Size
3085 bytes
Lines
232
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * dts file for Xilinx Versal NET fixed clock
 *
 * (C) Copyright 2022, Xilinx, Inc.
 * (C) Copyright 2022 - 2025, Advanced Micro Devices, Inc.
 *
 * Michal Simek <michal.simek@amd.com>
 */

/ {
	clk60: clk60 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <60000000>;
	};

	clk100: clk100 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <100000000>;
	};

	clk125: clk125 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <125000000>;
	};

	clk150: clk150 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <150000000>;
	};

	clk160: clk160 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <160000000>;
	};

	clk200: clk200 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <200000000>;
	};

	clk250: clk250 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <250000000>;
	};

	clk300: clk300 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <300000000>;
	};

	clk450: clk450 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <450000000>;
	};

	clk1200: clk1200 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <1200000000>;
	};

Annotation

Implementation Notes