arch/arm64/boot/dts/xilinx/versal-net.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/xilinx/versal-net.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/xilinx/versal-net.dtsi
Extension
.dtsi
Size
29636 bytes
Lines
1161
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * dts file for Xilinx Versal NET
 *
 * (C) Copyright 2022, Xilinx, Inc.
 * (C) Copyright 2022 - 2025, Advanced Micro Devices, Inc.
 *
 * Michal Simek <michal.simek@amd.com>
 */

/dts-v1/;

/ {
	compatible = "xlnx,versal-net";
	model = "Xilinx Versal NET";
	#address-cells = <2>;
	#size-cells = <2>;
	interrupt-parent = <&gic>;

	options {
		u-boot {
			compatible = "u-boot,config";
			bootscr-address = /bits/ 64 <0x20000000>;
		};
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu-map {
			cluster0 {
				core0 {
					cpu = <&cpu0>;
				};
				core1 {
					cpu = <&cpu100>;
				};
				core2 {
					cpu = <&cpu200>;
				};
				core3 {
					cpu = <&cpu300>;
				};
			};

			cluster1 {
				core0 {
					cpu = <&cpu10000>;
				};

				core1 {
					cpu = <&cpu10100>;
				};

				core2 {
					cpu = <&cpu10200>;
				};

				core3 {
					cpu = <&cpu10300>;
				};
			};
			cluster2 {
				core0 {
					cpu = <&cpu20000>;
				};

				core1 {
					cpu = <&cpu20100>;
				};

Annotation

Implementation Notes