arch/arm64/boot/dts/xilinx/versal-net-vn-x-b2197-01-revA.dts
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/xilinx/versal-net-vn-x-b2197-01-revA.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/xilinx/versal-net-vn-x-b2197-01-revA.dts- Extension
.dts- Size
- 2065 bytes
- Lines
- 117
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
versal-net.dtsiversal-net-clk.dtsidt-bindings/gpio/gpio.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* dts file for Xilinx Versal Net VNX board revA
*
* (C) Copyright 2022, Xilinx, Inc.
* (C) Copyright 2022 - 2025, Advanced Micro Devices, Inc.
*
* Michal Simek <michal.simek@amd.com>
*/
/dts-v1/;
#include "versal-net.dtsi"
#include "versal-net-clk.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
compatible = "xlnx,versal-net-vnx-revA", "xlnx,versal-net-vnx", "xlnx,versal-net";
model = "Xilinx Versal NET VNX revA";
dma-coherent;
memory: memory@0 {
reg = <0 0 0 0x80000000>;
device_type = "memory";
};
memory_hi: memory@800000000 {
reg = <8 0 3 0x80000000>;
device_type = "memory";
};
memory_hi2: memory@50000000000 {
reg = <0x500 0 4 0>;
device_type = "memory";
};
chosen {
bootargs = "console=ttyAMA1,115200n8";
stdout-path = "serial1:115200n8";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
rsc_tbl_carveout: rproc@bbf14000 {
reg = <0 0xbbf14000 0 0x1000>;
no-map;
};
rpu0vdev0vring0: rpu0vdev0vring0@bbf15000 {
reg = <0 0xbbf15000 0 0x1000>;
no-map;
};
rpu0vdev0vring1: rpu0vdev0vring1@bbf16000 {
reg = <0 0xbbf16000 0 0x1000>;
no-map;
};
rpu0vdev0buffer: rpu0vdev0buffer@bbf17000 {
reg = <0 0xbbf17000 0 0xD000>;
no-map;
};
reserve_others: reserveothers@0 {
reg = <0 0x0 0 0x1c200000>;
no-map;
};
pdi_update: pdiupdate@1c200000 {
reg = <0 0x1c200000 0 0x6000000>;
no-map;
};
reserve_optee_atf: reserveopteeatf@22200000 {
Annotation
- Immediate include surface: `versal-net.dtsi`, `versal-net-clk.dtsi`, `dt-bindings/gpio/gpio.h`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.