arch/arm64/crypto/sm4-ce-gcm-core.S

Source file repositories/reference/linux-study-clean/arch/arm64/crypto/sm4-ce-gcm-core.S

File Facts

System
Linux kernel
Corpus path
arch/arm64/crypto/sm4-ce-gcm-core.S
Extension
.S
Size
16931 bytes
Lines
743
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: arch/arm64
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#include <linux/linkage.h>
#include <linux/cfi_types.h>
#include <asm/assembler.h>
#include "sm4-ce-asm.h"

.arch	armv8-a+crypto

.irp b, 0, 1, 2, 3, 24, 25, 26, 27, 28, 29, 30, 31
	.set .Lv\b\().4s, \b
.endr

.macro sm4e, vd, vn
	.inst 0xcec08400 | (.L\vn << 5) | .L\vd
.endm

/* Register macros */

/* Used for both encryption and decryption */
#define	RHASH	v21
#define	RRCONST	v22
#define RZERO	v23

/* Helper macros. */

/*
 * input: m0, m1
 * output: r0:r1 (low 128-bits in r0, high in r1)
 */
#define PMUL_128x128(r0, r1, m0, m1, T0, T1)			\
		ext		T0.16b, m1.16b, m1.16b, #8;	\
		pmull		r0.1q, m0.1d, m1.1d;		\
		pmull		T1.1q, m0.1d, T0.1d;		\
		pmull2		T0.1q, m0.2d, T0.2d;		\
		pmull2		r1.1q, m0.2d, m1.2d;		\
		eor		T0.16b, T0.16b, T1.16b;		\
		ext		T1.16b, RZERO.16b, T0.16b, #8;	\
		ext		T0.16b, T0.16b, RZERO.16b, #8;	\
		eor		r0.16b, r0.16b, T1.16b;		\
		eor		r1.16b, r1.16b, T0.16b;

#define PMUL_128x128_4x(r0, r1, m0, m1, T0, T1,			\
			r2, r3, m2, m3, T2, T3,			\
			r4, r5, m4, m5, T4, T5,			\
			r6, r7, m6, m7, T6, T7)			\
		ext		T0.16b, m1.16b, m1.16b, #8;	\
		ext		T2.16b, m3.16b, m3.16b, #8;	\
		ext		T4.16b, m5.16b, m5.16b, #8;	\
		ext		T6.16b, m7.16b, m7.16b, #8;	\
		pmull		r0.1q, m0.1d, m1.1d;		\
		pmull		r2.1q, m2.1d, m3.1d;		\
		pmull		r4.1q, m4.1d, m5.1d;		\
		pmull		r6.1q, m6.1d, m7.1d;		\
		pmull		T1.1q, m0.1d, T0.1d;		\
		pmull		T3.1q, m2.1d, T2.1d;		\
		pmull		T5.1q, m4.1d, T4.1d;		\
		pmull		T7.1q, m6.1d, T6.1d;		\
		pmull2		T0.1q, m0.2d, T0.2d;		\
		pmull2		T2.1q, m2.2d, T2.2d;		\
		pmull2		T4.1q, m4.2d, T4.2d;		\
		pmull2		T6.1q, m6.2d, T6.2d;		\
		pmull2		r1.1q, m0.2d, m1.2d;		\
		pmull2		r3.1q, m2.2d, m3.2d;		\
		pmull2		r5.1q, m4.2d, m5.2d;		\
		pmull2		r7.1q, m6.2d, m7.2d;		\
		eor		T0.16b, T0.16b, T1.16b;		\
		eor		T2.16b, T2.16b, T3.16b;		\
		eor		T4.16b, T4.16b, T5.16b;		\
		eor		T6.16b, T6.16b, T7.16b;		\
		ext		T1.16b, RZERO.16b, T0.16b, #8;	\
		ext		T3.16b, RZERO.16b, T2.16b, #8;	\

Annotation

Implementation Notes