arch/arm64/include/asm/mmu.h
Source file repositories/reference/linux-study-clean/arch/arm64/include/asm/mmu.h
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/include/asm/mmu.h- Extension
.h- Size
- 3520 bytes
- Lines
- 111
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
asm/cputype.hlinux/refcount.hasm/cpufeature.h
Detected Declarations
function atomic64_readfunction kaslr_requires_kptifunction kpti_install_ng_mappings
Annotated Snippet
static inline void kpti_install_ng_mappings(void) {}
#endif
extern bool page_alloc_available;
#endif /* !__ASSEMBLER__ */
#endif
Annotation
- Immediate include surface: `asm/cputype.h`, `linux/refcount.h`, `asm/cpufeature.h`.
- Detected declarations: `function atomic64_read`, `function kaslr_requires_kpti`, `function kpti_install_ng_mappings`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.