arch/arm64/include/asm/por.h
Source file repositories/reference/linux-study-clean/arch/arm64/include/asm/por.h
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/include/asm/por.h- Extension
.h- Size
- 612 bytes
- Lines
- 35
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/sysreg.h
Detected Declarations
function Copyrightfunction por_elx_allows_writefunction por_elx_allows_exec
Annotated Snippet
#ifndef _ASM_ARM64_POR_H
#define _ASM_ARM64_POR_H
#include <asm/sysreg.h>
#define POR_EL0_INIT POR_ELx_PERM_PREP(0, POE_RWX)
static inline bool por_elx_allows_read(u64 por, u8 pkey)
{
u8 perm = POR_ELx_PERM_GET(pkey, por);
return perm & POE_R;
}
static inline bool por_elx_allows_write(u64 por, u8 pkey)
{
u8 perm = POR_ELx_PERM_GET(pkey, por);
return perm & POE_W;
}
static inline bool por_elx_allows_exec(u64 por, u8 pkey)
{
u8 perm = POR_ELx_PERM_GET(pkey, por);
return perm & POE_X;
}
#endif /* _ASM_ARM64_POR_H */
Annotation
- Immediate include surface: `asm/sysreg.h`.
- Detected declarations: `function Copyright`, `function por_elx_allows_write`, `function por_elx_allows_exec`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.