arch/arm64/include/asm/runtime-const.h
Source file repositories/reference/linux-study-clean/arch/arm64/include/asm/runtime-const.h
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/include/asm/runtime-const.h- Extension
.h- Size
- 2441 bytes
- Lines
- 93
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/cacheflush.hasm/byteorder.h
Detected Declarations
function __runtime_fixup_16function __runtime_fixup_cachesfunction __runtime_fixup_ptrfunction __runtime_fixup_shiftfunction runtime_const_fixup
Annotated Snippet
#ifndef _ASM_RUNTIME_CONST_H
#define _ASM_RUNTIME_CONST_H
#ifdef MODULE
#error "Cannot use runtime-const infrastructure from modules"
#endif
#include <asm/cacheflush.h>
/* Sigh. You can still run arm64 in BE mode */
#include <asm/byteorder.h>
#define runtime_const_ptr(sym) ({ \
typeof(sym) __ret; \
asm_inline("1:\t" \
"movz %0, #0xcdef\n\t" \
"movk %0, #0x89ab, lsl #16\n\t" \
"movk %0, #0x4567, lsl #32\n\t" \
"movk %0, #0x0123, lsl #48\n\t" \
".pushsection runtime_ptr_" #sym ",\"a\"\n\t" \
".long 1b - .\n\t" \
".popsection" \
:"=r" (__ret)); \
__ret; })
#define runtime_const_shift_right_32(val, sym) ({ \
unsigned long __ret; \
asm_inline("1:\t" \
"lsr %w0,%w1,#12\n\t" \
".pushsection runtime_shift_" #sym ",\"a\"\n\t" \
".long 1b - .\n\t" \
".popsection" \
:"=r" (__ret) \
:"r" (0u+(val))); \
__ret; })
#define runtime_const_init(type, sym) do { \
extern s32 __start_runtime_##type##_##sym[]; \
extern s32 __stop_runtime_##type##_##sym[]; \
runtime_const_fixup(__runtime_fixup_##type, \
(unsigned long)(sym), \
__start_runtime_##type##_##sym, \
__stop_runtime_##type##_##sym); \
} while (0)
/* 16-bit immediate for wide move (movz and movk) in bits 5..20 */
static inline void __runtime_fixup_16(__le32 *p, unsigned int val)
{
u32 insn = le32_to_cpu(*p);
insn &= 0xffe0001f;
insn |= (val & 0xffff) << 5;
*p = cpu_to_le32(insn);
}
static inline void __runtime_fixup_caches(void *where, unsigned int insns)
{
unsigned long va = (unsigned long)where;
caches_clean_inval_pou(va, va + 4*insns);
}
static inline void __runtime_fixup_ptr(void *where, unsigned long val)
{
__le32 *p = lm_alias(where);
__runtime_fixup_16(p, val);
__runtime_fixup_16(p+1, val >> 16);
__runtime_fixup_16(p+2, val >> 32);
__runtime_fixup_16(p+3, val >> 48);
__runtime_fixup_caches(where, 4);
}
/* Immediate value is 6 bits starting at bit #16 */
static inline void __runtime_fixup_shift(void *where, unsigned long val)
{
__le32 *p = lm_alias(where);
u32 insn = le32_to_cpu(*p);
insn &= 0xffc0ffff;
insn |= (val & 63) << 16;
*p = cpu_to_le32(insn);
__runtime_fixup_caches(where, 1);
}
static inline void runtime_const_fixup(void (*fn)(void *, unsigned long),
unsigned long val, s32 *start, s32 *end)
{
while (start < end) {
fn(*start + (void *)start, val);
start++;
}
}
Annotation
- Immediate include surface: `asm/cacheflush.h`, `asm/byteorder.h`.
- Detected declarations: `function __runtime_fixup_16`, `function __runtime_fixup_caches`, `function __runtime_fixup_ptr`, `function __runtime_fixup_shift`, `function runtime_const_fixup`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.