arch/arm64/include/asm/vdso/compat_barrier.h

File Facts

System

Linux kernel

Corpus path

arch/arm64/include/asm/vdso/compat_barrier.h

Extension

.h

Size

755 bytes

Lines

37

Domain

Architecture Layer

Bucket

arch/arm64

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef __COMPAT_BARRIER_H
#define __COMPAT_BARRIER_H

#ifndef __ASSEMBLER__
/*
 * Warning: This code is meant to be used from the compat vDSO only.
 */
#ifdef __arch64__
#error This header is meant to be used with from the compat vDSO only
#endif

#ifdef dmb
#undef dmb
#endif

#define dmb(option) __asm__ __volatile__ ("dmb " #option : : : "memory")

#define aarch32_smp_mb()	dmb(ish)
#define aarch32_smp_rmb()	dmb(ishld)
#define aarch32_smp_wmb()	dmb(ishst)

#undef smp_mb
#undef smp_rmb
#undef smp_wmb

#define smp_mb()	aarch32_smp_mb()
#define smp_rmb()	aarch32_smp_rmb()
#define smp_wmb()	aarch32_smp_wmb()

#endif /* !__ASSEMBLER__ */

#endif /* __COMPAT_BARRIER_H */

Annotation

• Atlas domain: Architecture Layer / arch/arm64.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.