arch/arm64/kvm/hyp/include/nvhe/spinlock.h
Source file repositories/reference/linux-study-clean/arch/arm64/kvm/hyp/include/nvhe/spinlock.h
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/kvm/hyp/include/nvhe/spinlock.h- Extension
.h- Size
- 2912 bytes
- Lines
- 126
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
Dependency Surface
asm/alternative.hasm/lse.hasm/rwonce.h
Detected Declarations
function hyp_spin_lockfunction hyp_spin_unlockfunction hyp_spin_is_lockedfunction hyp_assert_lock_heldfunction hyp_assert_lock_held
Annotated Snippet
static inline void hyp_assert_lock_held(hyp_spinlock_t *lock) { }
#endif
#endif /* __ARM64_KVM_NVHE_SPINLOCK_H__ */Annotation
- Immediate include surface: `asm/alternative.h`, `asm/lse.h`, `asm/rwonce.h`.
- Detected declarations: `function hyp_spin_lock`, `function hyp_spin_unlock`, `function hyp_spin_is_locked`, `function hyp_assert_lock_held`, `function hyp_assert_lock_held`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.