arch/arm64/kvm/sys_regs.c
Source file repositories/reference/linux-study-clean/arch/arm64/kvm/sys_regs.c
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/kvm/sys_regs.c- Extension
.c- Size
- 163780 bytes
- Lines
- 5863
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/bsearch.hlinux/cacheinfo.hlinux/debugfs.hlinux/kvm_host.hlinux/mm.hlinux/printk.hlinux/uaccess.hlinux/irqchip/arm-gic-v3.hasm/arm_pmuv3.hasm/cacheflush.hasm/cputype.hasm/debug-monitors.hasm/esr.hasm/kvm_arm.hasm/kvm_emulate.hasm/kvm_hyp.hasm/kvm_mmu.hasm/kvm_nested.hasm/perf_event.hasm/sysreg.htrace/events/kvm.hsys_regs.hvgic/vgic.htrace.h
Detected Declarations
struct sr_locenum sr_loc_attrfunction undef_accessfunction bad_trapfunction read_from_write_onlyfunction write_to_read_onlyfunction locate_direct_registerfunction locate_mapped_el2_registerfunction locate_registerfunction read_sr_from_cpufunction write_sr_to_cpufunction vcpu_read_sys_regfunction vcpu_write_sys_regfunction Log2function get_ccsidrfunction set_ccsidrfunction access_rwfunction access_dcswfunction access_dcgswfunction get_access_maskfunction access_vm_regfunction access_actlrfunction access_gic_sgifunction access_gic_srefunction access_gic_dirfunction access_gicv5_idr0function access_gicv5_iaffidfunction access_gicv5_ppi_enablerfunction trap_raz_wifunction RES0function trap_oslar_el1function trap_oslsr_el1function set_oslsr_el1function trap_dbgauthstatus_el1function trap_debug_regsfunction reg_to_dbgfunction dbg_to_regfunction trap_dbg_wb_regfunction set_dbg_wb_regfunction get_dbg_wb_regfunction reset_dbg_wb_regfunction reset_amair_el1function reset_actlrfunction reset_mpidrfunction hidden_visibilityfunction pmu_visibilityfunction reset_pmu_regfunction reset_pmevcntr
Annotated Snippet
struct sr_loc {
enum sr_loc_attr loc;
enum vcpu_sysreg map_reg;
u64 (*xlate)(u64);
};
static enum sr_loc_attr locate_direct_register(const struct kvm_vcpu *vcpu,
enum vcpu_sysreg reg)
{
switch (reg) {
case SCTLR_EL1:
case CPACR_EL1:
case TTBR0_EL1:
case TTBR1_EL1:
case TCR_EL1:
case TCR2_EL1:
case PIR_EL1:
case PIRE0_EL1:
case POR_EL1:
case ESR_EL1:
case AFSR0_EL1:
case AFSR1_EL1:
case FAR_EL1:
case MAIR_EL1:
case VBAR_EL1:
case CONTEXTIDR_EL1:
case AMAIR_EL1:
case CNTKCTL_EL1:
case ELR_EL1:
case SPSR_EL1:
case ZCR_EL1:
case SCTLR2_EL1:
/*
* EL1 registers which have an ELx2 mapping are loaded if
* we're not in hypervisor context.
*/
return is_hyp_ctxt(vcpu) ? SR_LOC_MEMORY : SR_LOC_LOADED;
case TPIDR_EL0:
case TPIDRRO_EL0:
case TPIDR_EL1:
case PAR_EL1:
case DACR32_EL2:
case IFSR32_EL2:
case DBGVCR32_EL2:
/* These registers are always loaded, no matter what */
return SR_LOC_LOADED;
default:
/* Non-mapped EL2 registers are by definition in memory. */
return SR_LOC_MEMORY;
}
}
static void locate_mapped_el2_register(const struct kvm_vcpu *vcpu,
enum vcpu_sysreg reg,
enum vcpu_sysreg map_reg,
u64 (*xlate)(u64),
struct sr_loc *loc)
{
if (!is_hyp_ctxt(vcpu)) {
loc->loc = SR_LOC_MEMORY;
return;
}
loc->loc = SR_LOC_LOADED | SR_LOC_MAPPED;
loc->map_reg = map_reg;
WARN_ON(locate_direct_register(vcpu, map_reg) != SR_LOC_MEMORY);
if (xlate != NULL && !vcpu_el2_e2h_is_set(vcpu)) {
loc->loc |= SR_LOC_XLATED;
loc->xlate = xlate;
}
}
#define MAPPED_EL2_SYSREG(r, m, t) \
case r: { \
locate_mapped_el2_register(vcpu, r, m, t, loc); \
break; \
}
static void locate_register(const struct kvm_vcpu *vcpu, enum vcpu_sysreg reg,
struct sr_loc *loc)
{
if (!vcpu_get_flag(vcpu, SYSREGS_ON_CPU)) {
loc->loc = SR_LOC_MEMORY;
return;
}
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/bsearch.h`, `linux/cacheinfo.h`, `linux/debugfs.h`, `linux/kvm_host.h`, `linux/mm.h`, `linux/printk.h`, `linux/uaccess.h`.
- Detected declarations: `struct sr_loc`, `enum sr_loc_attr`, `function undef_access`, `function bad_trap`, `function read_from_write_only`, `function write_to_read_only`, `function locate_direct_register`, `function locate_mapped_el2_register`, `function locate_register`, `function read_sr_from_cpu`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: source implementation candidate.
- This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.