arch/csky/abiv1/inc/abi/ckmmu.h
Source file repositories/reference/linux-study-clean/arch/csky/abiv1/inc/abi/ckmmu.h
File Facts
- System
- Linux kernel
- Corpus path
arch/csky/abiv1/inc/abi/ckmmu.h- Extension
.h- Size
- 1594 bytes
- Lines
- 102
- Domain
- Architecture Layer
- Bucket
- arch/csky
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
abi/reg_ops.h
Detected Declarations
function read_mmu_indexfunction write_mmu_indexfunction read_mmu_entrylo0function read_mmu_entrylo1function write_mmu_pagemaskfunction read_mmu_entryhifunction write_mmu_entryhifunction read_mmu_msa0function write_mmu_msa0function read_mmu_msa1function write_mmu_msa1function tlb_probefunction tlb_readfunction tlb_invalid_allfunction local_tlb_invalid_allfunction tlb_invalid_indexedfunction setup_pgd
Annotated Snippet
#ifndef __ASM_CSKY_CKMMUV1_H
#define __ASM_CSKY_CKMMUV1_H
#include <abi/reg_ops.h>
static inline int read_mmu_index(void)
{
return cprcr("cpcr0");
}
static inline void write_mmu_index(int value)
{
cpwcr("cpcr0", value);
}
static inline int read_mmu_entrylo0(void)
{
return cprcr("cpcr2") << 6;
}
static inline int read_mmu_entrylo1(void)
{
return cprcr("cpcr3") << 6;
}
static inline void write_mmu_pagemask(int value)
{
cpwcr("cpcr6", value);
}
static inline int read_mmu_entryhi(void)
{
return cprcr("cpcr4");
}
static inline void write_mmu_entryhi(int value)
{
cpwcr("cpcr4", value);
}
static inline unsigned long read_mmu_msa0(void)
{
return cprcr("cpcr30");
}
static inline void write_mmu_msa0(unsigned long value)
{
cpwcr("cpcr30", value);
}
static inline unsigned long read_mmu_msa1(void)
{
return cprcr("cpcr31");
}
static inline void write_mmu_msa1(unsigned long value)
{
cpwcr("cpcr31", value);
}
/*
* TLB operations.
*/
static inline void tlb_probe(void)
{
cpwcr("cpcr8", 0x80000000);
}
static inline void tlb_read(void)
{
cpwcr("cpcr8", 0x40000000);
}
static inline void tlb_invalid_all(void)
{
cpwcr("cpcr8", 0x04000000);
}
static inline void local_tlb_invalid_all(void)
{
tlb_invalid_all();
}
static inline void tlb_invalid_indexed(void)
{
cpwcr("cpcr8", 0x02000000);
}
static inline void setup_pgd(pgd_t *pgd, int asid)
{
Annotation
- Immediate include surface: `abi/reg_ops.h`.
- Detected declarations: `function read_mmu_index`, `function write_mmu_index`, `function read_mmu_entrylo0`, `function read_mmu_entrylo1`, `function write_mmu_pagemask`, `function read_mmu_entryhi`, `function write_mmu_entryhi`, `function read_mmu_msa0`, `function write_mmu_msa0`, `function read_mmu_msa1`.
- Atlas domain: Architecture Layer / arch/csky.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.