arch/csky/abiv2/inc/abi/ckmmu.h
Source file repositories/reference/linux-study-clean/arch/csky/abiv2/inc/abi/ckmmu.h
File Facts
- System
- Linux kernel
- Corpus path
arch/csky/abiv2/inc/abi/ckmmu.h- Extension
.h- Size
- 2157 bytes
- Lines
- 140
- Domain
- Architecture Layer
- Bucket
- arch/csky
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
abi/reg_ops.hasm/barrier.h
Detected Declarations
function read_mmu_indexfunction write_mmu_indexfunction read_mmu_entrylo0function read_mmu_entrylo1function write_mmu_pagemaskfunction read_mmu_entryhifunction write_mmu_entryhifunction read_mmu_msa0function write_mmu_msa0function read_mmu_msa1function write_mmu_msa1function tlb_probefunction tlb_readfunction tlb_invalid_allfunction local_tlb_invalid_allfunction tlb_invalid_indexedfunction setup_pgd
Annotated Snippet
#ifndef __ASM_CSKY_CKMMUV2_H
#define __ASM_CSKY_CKMMUV2_H
#include <abi/reg_ops.h>
#include <asm/barrier.h>
static inline int read_mmu_index(void)
{
return mfcr("cr<0, 15>");
}
static inline void write_mmu_index(int value)
{
mtcr("cr<0, 15>", value);
}
static inline int read_mmu_entrylo0(void)
{
return mfcr("cr<2, 15>");
}
static inline int read_mmu_entrylo1(void)
{
return mfcr("cr<3, 15>");
}
static inline void write_mmu_pagemask(int value)
{
mtcr("cr<6, 15>", value);
}
static inline int read_mmu_entryhi(void)
{
return mfcr("cr<4, 15>");
}
static inline void write_mmu_entryhi(int value)
{
mtcr("cr<4, 15>", value);
}
static inline unsigned long read_mmu_msa0(void)
{
return mfcr("cr<30, 15>");
}
static inline void write_mmu_msa0(unsigned long value)
{
mtcr("cr<30, 15>", value);
}
static inline unsigned long read_mmu_msa1(void)
{
return mfcr("cr<31, 15>");
}
static inline void write_mmu_msa1(unsigned long value)
{
mtcr("cr<31, 15>", value);
}
/*
* TLB operations.
*/
static inline void tlb_probe(void)
{
mtcr("cr<8, 15>", 0x80000000);
}
static inline void tlb_read(void)
{
mtcr("cr<8, 15>", 0x40000000);
}
static inline void tlb_invalid_all(void)
{
#ifdef CONFIG_CPU_HAS_TLBI
sync_is();
asm volatile(
"tlbi.alls \n"
"sync.i \n"
:
:
: "memory");
#else
mtcr("cr<8, 15>", 0x04000000);
#endif
}
static inline void local_tlb_invalid_all(void)
Annotation
- Immediate include surface: `abi/reg_ops.h`, `asm/barrier.h`.
- Detected declarations: `function read_mmu_index`, `function write_mmu_index`, `function read_mmu_entrylo0`, `function read_mmu_entrylo1`, `function write_mmu_pagemask`, `function read_mmu_entryhi`, `function write_mmu_entryhi`, `function read_mmu_msa0`, `function write_mmu_msa0`, `function read_mmu_msa1`.
- Atlas domain: Architecture Layer / arch/csky.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.