arch/hexagon/include/asm/smp.h
Source file repositories/reference/linux-study-clean/arch/hexagon/include/asm/smp.h
File Facts
- System
- Linux kernel
- Corpus path
arch/hexagon/include/asm/smp.h- Extension
.h- Size
- 707 bytes
- Lines
- 31
- Domain
- Architecture Layer
- Bucket
- arch/hexagon
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/cpumask.h
Detected Declarations
enum ipi_message_type
Annotated Snippet
#ifndef __ASM_SMP_H
#define __ASM_SMP_H
#include <linux/cpumask.h>
#define raw_smp_processor_id() (current_thread_info()->cpu)
enum ipi_message_type {
IPI_NOP = 0,
IPI_RESCHEDULE = 1,
IPI_CALL_FUNC,
IPI_CPU_STOP,
IPI_TIMER,
};
extern void send_ipi(const struct cpumask *cpumask, enum ipi_message_type msg);
extern void smp_start_cpus(void);
extern void arch_send_call_function_single_ipi(int cpu);
extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
extern void smp_vm_unmask_irq(void *info);
#endif
Annotation
- Immediate include surface: `linux/cpumask.h`.
- Detected declarations: `enum ipi_message_type`.
- Atlas domain: Architecture Layer / arch/hexagon.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.