arch/hexagon/kernel/vm_entry.S

Source file repositories/reference/linux-study-clean/arch/hexagon/kernel/vm_entry.S

File Facts

System
Linux kernel
Corpus path
arch/hexagon/kernel/vm_entry.S
Extension
.S
Size
10198 bytes
Lines
381
Domain
Architecture Layer
Bucket
arch/hexagon
Inferred role
Architecture Layer: arch/hexagon
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#include <asm/asm-offsets.h>  /*  assembly-safer versions of C defines */
#include <asm/mem-layout.h>   /*  sigh, except for page_offset  */
#include <asm/hexagon_vm.h>
#include <asm/thread_info.h>

/*
 * Entry into guest-mode Linux under Hexagon Virtual Machine.
 * Stack pointer points to event record - build pt_regs on top of it,
 * set up a plausible C stack frame, and dispatch to the C handler.
 * On return, do vmrte virtual instruction with SP where we started.
 *
 * VM Spec 0.5 uses a trap to fetch HVM record now.
 */

/*
 * Save full register state, while setting up thread_info struct
 * pointer derived from kernel stack pointer in THREADINFO_REG
 * register, putting prior thread_info.regs pointer in a callee-save
 * register (R24, which had better not ever be assigned to THREADINFO_REG),
 * and updating thread_info.regs to point to current stack frame,
 * so as to support nested events in kernel mode.
 *
 * As this is common code, we set the pt_regs system call number
 * to -1 for all events.  It will be replaced with the system call
 * number in the case where we decode a system call (trap0(#1)).
 */

#if CONFIG_HEXAGON_ARCH_VERSION < 4
#define save_pt_regs()\
 memd(R0 + #_PT_R3130) = R31:30; \
 { memw(R0 + #_PT_R2928) = R28; \
   R31 = memw(R0 + #_PT_ER_VMPSP); }\
 { memw(R0 + #(_PT_R2928 + 4)) = R31; \
   R31 = ugp; } \
 { memd(R0 + #_PT_R2726) = R27:26; \
   R30 = gp ; } \
 memd(R0 + #_PT_R2524) = R25:24; \
 memd(R0 + #_PT_R2322) = R23:22; \
 memd(R0 + #_PT_R2120) = R21:20; \
 memd(R0 + #_PT_R1918) = R19:18; \
 memd(R0 + #_PT_R1716) = R17:16; \
 memd(R0 + #_PT_R1514) = R15:14; \
 memd(R0 + #_PT_R1312) = R13:12; \
 { memd(R0 + #_PT_R1110) = R11:10; \
   R15 = lc0; } \
 { memd(R0 + #_PT_R0908) = R9:8; \
   R14 = sa0; } \
 { memd(R0 + #_PT_R0706) = R7:6; \
   R13 = lc1; } \
 { memd(R0 + #_PT_R0504) = R5:4; \
   R12 = sa1; } \
 { memd(R0 + #_PT_GPUGP) = R31:30; \
   R11 = m1; \
   R2.H = #HI(_THREAD_SIZE); } \
 { memd(R0 + #_PT_LC0SA0) = R15:14; \
   R10 = m0; \
   R2.L = #LO(_THREAD_SIZE); } \
 { memd(R0 + #_PT_LC1SA1) = R13:12; \
   R15 = p3:0; \
   R2 = neg(R2); } \
 { memd(R0 + #_PT_M1M0) = R11:10; \
   R14  = usr; \
   R2 = and(R0,R2); } \
 { memd(R0 + #_PT_PREDSUSR) =  R15:14; \
   THREADINFO_REG = R2; } \
 { r24 = memw(THREADINFO_REG + #_THREAD_INFO_PT_REGS); \
   memw(THREADINFO_REG + #_THREAD_INFO_PT_REGS) = R0; \
   R2 = #-1; } \
 { memw(R0 + #_PT_SYSCALL_NR) = R2; \
   R30 = #0; }

Annotation

Implementation Notes