arch/loongarch/include/asm/cmpxchg.h

Source file repositories/reference/linux-study-clean/arch/loongarch/include/asm/cmpxchg.h

File Facts

System
Linux kernel
Corpus path
arch/loongarch/include/asm/cmpxchg.h
Extension
.h
Size
7271 bytes
Lines
305
Domain
Architecture Layer
Bucket
arch/loongarch
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __ASM_CMPXCHG_H
#define __ASM_CMPXCHG_H

#include <linux/bits.h>
#include <linux/build_bug.h>
#include <asm/barrier.h>
#include <asm/cpu-features.h>

#define __xchg_amo_asm(amswap_db, m, val)	\
({						\
	__typeof(val) __ret;			\
						\
	__asm__ __volatile__ (			\
	" "amswap_db" %1, %z2, %0 \n"		\
	: "+ZB" (*m), "=&r" (__ret)		\
	: "Jr" (val)				\
	: "memory");				\
						\
	__ret;					\
})

#define __xchg_llsc_asm(ld, st, m, val)			\
({							\
	__typeof(val) __ret, __tmp;			\
							\
	asm volatile (					\
	"1:	ll.w	%0, %3		\n"		\
	"	move	%1, %z4		\n"		\
	"	sc.w	%1, %2		\n"		\
	"	beqz	%1, 1b		\n"		\
	: "=&r" (__ret), "=&r" (__tmp), "=ZC" (*m)	\
	: "ZC" (*m), "Jr" (val)				\
	: "memory");					\
							\
	__ret;						\
})

static inline unsigned int __xchg_small(volatile void *ptr, unsigned int val,
					unsigned int size)
{
	unsigned int shift;
	u32 old32, mask, temp;
	volatile u32 *ptr32;

	/* Mask value to the correct size. */
	mask = GENMASK((size * BITS_PER_BYTE) - 1, 0);
	val &= mask;

	/*
	 * Calculate a shift & mask that correspond to the value we wish to
	 * exchange within the naturally aligned 4 byte integerthat includes
	 * it.
	 */
	shift = (unsigned long)ptr & 0x3;
	shift *= BITS_PER_BYTE;
	mask <<= shift;

	/*
	 * Calculate a pointer to the naturally aligned 4 byte integer that
	 * includes our byte of interest, and load its value.
	 */
	ptr32 = (volatile u32 *)((unsigned long)ptr & ~0x3);

	asm volatile (
	"1:	ll.w		%0, %3		\n"
	"	andn		%1, %0, %z4	\n"
	"	or		%1, %1, %z5	\n"
	"	sc.w		%1, %2		\n"
	"	beqz		%1, 1b		\n"
	: "=&r" (old32), "=&r" (temp), "=ZC" (*ptr32)
	: "ZC" (*ptr32), "Jr" (mask), "Jr" (val << shift)
	: "memory");

	return (old32 & mask) >> shift;
}

static __always_inline unsigned long
__arch_xchg(volatile void *ptr, unsigned long x, int size)
{
	switch (size) {
	case 1:
	case 2:
		return __xchg_small((volatile void *)ptr, x, size);

	case 4:
#ifdef CONFIG_CPU_HAS_AMO
		return __xchg_amo_asm("amswap_db.w", (volatile u32 *)ptr, (u32)x);
#else
		return __xchg_llsc_asm("ll.w", "sc.w", (volatile u32 *)ptr, (u32)x);
#endif /* CONFIG_CPU_HAS_AMO */

Annotation

Implementation Notes