arch/loongarch/include/asm/loongarch.h

Source file repositories/reference/linux-study-clean/arch/loongarch/include/asm/loongarch.h

File Facts

System
Linux kernel
Corpus path
arch/loongarch/include/asm/loongarch.h
Extension
.h
Size
62611 bytes
Lines
1630
Domain
Architecture Layer
Bucket
arch/loongarch
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _ASM_LOONGARCH_H
#define _ASM_LOONGARCH_H

#include <linux/bits.h>
#include <linux/linkage.h>
#include <linux/types.h>

#ifndef __ASSEMBLER__
#include <larchintrin.h>

/* CPUCFG */
#define read_cpucfg(reg) __cpucfg(reg)

#endif /* !__ASSEMBLER__ */

#ifdef __ASSEMBLER__

/* LoongArch Registers */
#define REG_ZERO	0x0
#define REG_RA		0x1
#define REG_TP		0x2
#define REG_SP		0x3
#define REG_A0		0x4 /* Reused as V0 for return value */
#define REG_A1		0x5 /* Reused as V1 for return value */
#define REG_A2		0x6
#define REG_A3		0x7
#define REG_A4		0x8
#define REG_A5		0x9
#define REG_A6		0xa
#define REG_A7		0xb
#define REG_T0		0xc
#define REG_T1		0xd
#define REG_T2		0xe
#define REG_T3		0xf
#define REG_T4		0x10
#define REG_T5		0x11
#define REG_T6		0x12
#define REG_T7		0x13
#define REG_T8		0x14
#define REG_U0		0x15 /* Kernel uses it as percpu base */
#define REG_FP		0x16
#define REG_S0		0x17
#define REG_S1		0x18
#define REG_S2		0x19
#define REG_S3		0x1a
#define REG_S4		0x1b
#define REG_S5		0x1c
#define REG_S6		0x1d
#define REG_S7		0x1e
#define REG_S8		0x1f

#endif /* __ASSEMBLER__ */

/* Bit fields for CPUCFG registers */
#define LOONGARCH_CPUCFG0		0x0
#define  CPUCFG0_PRID			GENMASK(31, 0)

#define LOONGARCH_CPUCFG1		0x1
#define  CPUCFG1_ISGR32			BIT(0)
#define  CPUCFG1_ISGR64			BIT(1)
#define  CPUCFG1_ISA			GENMASK(1, 0)
#define  CPUCFG1_PAGING			BIT(2)
#define  CPUCFG1_IOCSR			BIT(3)
#define  CPUCFG1_PABITS			GENMASK(11, 4)
#define  CPUCFG1_VABITS			GENMASK(19, 12)
#define  CPUCFG1_UAL			BIT(20)
#define  CPUCFG1_RI			BIT(21)
#define  CPUCFG1_EP			BIT(22)
#define  CPUCFG1_RPLV			BIT(23)
#define  CPUCFG1_HUGEPG			BIT(24)
#define  CPUCFG1_CRC32			BIT(25)
#define  CPUCFG1_MSGINT			BIT(26)

#define LOONGARCH_CPUCFG2		0x2
#define  CPUCFG2_FP			BIT(0)
#define  CPUCFG2_FPSP			BIT(1)
#define  CPUCFG2_FPDP			BIT(2)
#define  CPUCFG2_FPVERS			GENMASK(5, 3)
#define  CPUCFG2_LSX			BIT(6)
#define  CPUCFG2_LASX			BIT(7)
#define  CPUCFG2_COMPLEX		BIT(8)
#define  CPUCFG2_CRYPTO			BIT(9)
#define  CPUCFG2_LVZP			BIT(10)
#define  CPUCFG2_LVZVER			GENMASK(13, 11)
#define  CPUCFG2_LLFTP			BIT(14)
#define  CPUCFG2_LLFTPREV		GENMASK(17, 15)
#define  CPUCFG2_X86BT			BIT(18)
#define  CPUCFG2_ARMBT			BIT(19)
#define  CPUCFG2_MIPSBT			BIT(20)
#define  CPUCFG2_LSPW			BIT(21)

Annotation

Implementation Notes