arch/loongarch/include/asm/mmu_context.h

File Facts

System

Linux kernel

Corpus path

arch/loongarch/include/asm/mmu_context.h

Extension

.h

Size

4131 bytes

Lines

172

Domain

Architecture Layer

Bucket

arch/loongarch

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
• Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/errno.h
• linux/sched.h
• linux/mm_types.h
• linux/smp.h
• linux/slab.h
• asm/cacheflush.h
• asm/tlbflush.h
• asm-generic/mm_hooks.h

Detected Declarations

• function Copyright
• function asid_first_version
• function asid_valid
• function enter_lazy_tlb
• function init_new_context
• function atomic_update_pgd_asid
• function switch_mm_irqs_off
• function switch_mm
• function destroy_context

Annotated Snippet

if (!current->mm || (current->mm == mm)) {
			get_new_mmu_context(mm, cpu, &need_flush);

			write_csr_asid(cpu_asid(cpu, mm));
			if (need_flush)
				local_flush_tlb_user(); /* Flush tlb after update ASID */

			goto out;
		}
	}

	/* Will get a new context next time */
	cpu_context(cpu, mm) = 0;
	cpumask_clear_cpu(cpu, mm_cpumask(mm));
out:
	local_irq_restore(flags);
}

#endif /* _ASM_MMU_CONTEXT_H */

Annotation

• Immediate include surface: `linux/errno.h`, `linux/sched.h`, `linux/mm_types.h`, `linux/smp.h`, `linux/slab.h`, `asm/cacheflush.h`, `asm/tlbflush.h`, `asm-generic/mm_hooks.h`.
• Detected declarations: `function Copyright`, `function asid_first_version`, `function asid_valid`, `function enter_lazy_tlb`, `function init_new_context`, `function atomic_update_pgd_asid`, `function switch_mm_irqs_off`, `function switch_mm`, `function destroy_context`.
• Atlas domain: Architecture Layer / arch/loongarch.
• Implementation status: source implementation candidate.
• Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.