arch/loongarch/include/asm/processor.h

Source file repositories/reference/linux-study-clean/arch/loongarch/include/asm/processor.h

File Facts

System
Linux kernel
Corpus path
arch/loongarch/include/asm/processor.h
Extension
.h
Size
5482 bytes
Lines
222
Domain
Architecture Layer
Bucket
arch/loongarch
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

struct loongarch_fpu {
	union fpureg	fpr[NUM_FPU_REGS];
	uint64_t	fcc;	/* 8x8 */
	uint32_t	fcsr;
	uint32_t	ftop;
};

struct loongarch_lbt {
	/* Scratch registers */
	unsigned long scr0;
	unsigned long scr1;
	unsigned long scr2;
	unsigned long scr3;
	/* Eflags register */
	unsigned long eflags;
};

#define INIT_CPUMASK { \
	{0,} \
}

#define ARCH_MIN_TASKALIGN	32

struct loongarch_vdso_info;

/*
 * If you change thread_struct remember to change the #defines below too!
 */
struct thread_struct {
	/* Main processor registers. */
	unsigned long reg01, reg03, reg22; /* ra sp fp */
	unsigned long reg23, reg24, reg25, reg26; /* s0-s3 */
	unsigned long reg27, reg28, reg29, reg30, reg31; /* s4-s8 */

	/* __schedule() return address / call frame address */
	unsigned long sched_ra;
	unsigned long sched_cfa;

	/* CSR registers */
	unsigned long csr_prmd;
	unsigned long csr_crmd;
	unsigned long csr_euen;
	unsigned long csr_ecfg;
	unsigned long csr_badvaddr;	/* Last user fault */

	/* Other stuff associated with the thread. */
	unsigned long trap_nr;
	unsigned long error_code;
	unsigned long single_step; /* Used by PTRACE_SINGLESTEP */
	struct loongarch_vdso_info *vdso;

	/*
	 * FPU & vector registers, must be at the last of inherited
	 * context because they are conditionally copied at fork().
	 */
	struct loongarch_fpu fpu FPU_ALIGN;
	struct loongarch_lbt lbt; /* Also conditionally copied */

	/* Hardware breakpoints pinned to this task. */
	struct perf_event *hbp_break[LOONGARCH_MAX_BRP];
	struct perf_event *hbp_watch[LOONGARCH_MAX_WRP];
};

#define thread_saved_ra(tsk)	(tsk->thread.sched_ra)
#define thread_saved_fp(tsk)	(tsk->thread.sched_cfa)

#define INIT_THREAD  {						\
	/*							\
	 * Main processor registers				\
	 */							\
	.reg01			= 0,				\
	.reg03			= 0,				\
	.reg22			= 0,				\
	.reg23			= 0,				\
	.reg24			= 0,				\
	.reg25			= 0,				\
	.reg26			= 0,				\
	.reg27			= 0,				\
	.reg28			= 0,				\
	.reg29			= 0,				\
	.reg30			= 0,				\
	.reg31			= 0,				\
	.sched_ra		= 0,				\
	.sched_cfa		= 0,				\
	.csr_crmd		= 0,				\
	.csr_prmd		= 0,				\
	.csr_euen		= 0,				\
	.csr_ecfg		= 0,				\
	.csr_badvaddr		= 0,				\
	/*							\

Annotation

Implementation Notes