arch/loongarch/include/asm/setup.h

File Facts

System

Linux kernel

Corpus path

arch/loongarch/include/asm/setup.h

Extension

.h

Size

1286 bytes

Lines

55

Domain

Architecture Layer

Bucket

arch/loongarch

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/types.h
• linux/threads.h
• asm/sections.h
• uapi/asm/setup.h

Detected Declarations

• struct rela_la_abs
• function kaslr_offset

Annotated Snippet

struct rela_la_abs {
	long pc;
	long symvalue;
};

extern long __la_abs_begin;
extern long __la_abs_end;
extern long __rela_dyn_begin;
extern long __rela_dyn_end;

#ifdef CONFIG_RELR
extern long __relr_dyn_begin;
extern long __relr_dyn_end;
#endif

extern unsigned long __init relocate_kernel(void);

#endif

static inline unsigned long kaslr_offset(void)
{
	return (unsigned long)&_text - VMLINUX_LOAD_ADDRESS;
}

#endif /* __SETUP_H */

Annotation

• Immediate include surface: `linux/types.h`, `linux/threads.h`, `asm/sections.h`, `uapi/asm/setup.h`.
• Detected declarations: `struct rela_la_abs`, `function kaslr_offset`.
• Atlas domain: Architecture Layer / arch/loongarch.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.