arch/loongarch/kernel/topology.c
Source file repositories/reference/linux-study-clean/arch/loongarch/kernel/topology.c
File Facts
- System
- Linux kernel
- Corpus path
arch/loongarch/kernel/topology.c- Extension
.c- Size
- 369 bytes
- Lines
- 19
- Domain
- Architecture Layer
- Bucket
- arch/loongarch
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
linux/acpi.hlinux/cpu.hlinux/cpumask.hlinux/init.hlinux/node.hlinux/nodemask.hlinux/percpu.hasm/bootinfo.hacpi/processor.h
Detected Declarations
function arch_cpu_is_hotpluggable
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
#include <linux/acpi.h>
#include <linux/cpu.h>
#include <linux/cpumask.h>
#include <linux/init.h>
#include <linux/node.h>
#include <linux/nodemask.h>
#include <linux/percpu.h>
#include <asm/bootinfo.h>
#include <acpi/processor.h>
#ifdef CONFIG_HOTPLUG_CPU
bool arch_cpu_is_hotpluggable(int cpu)
{
return !io_master(cpu);
}
#endif
Annotation
- Immediate include surface: `linux/acpi.h`, `linux/cpu.h`, `linux/cpumask.h`, `linux/init.h`, `linux/node.h`, `linux/nodemask.h`, `linux/percpu.h`, `asm/bootinfo.h`.
- Detected declarations: `function arch_cpu_is_hotpluggable`.
- Atlas domain: Architecture Layer / arch/loongarch.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.