arch/loongarch/kvm/intc/dmsintc.c
Source file repositories/reference/linux-study-clean/arch/loongarch/kvm/intc/dmsintc.c
File Facts
- System
- Linux kernel
- Corpus path
arch/loongarch/kvm/intc/dmsintc.c- Extension
.c- Size
- 4389 bytes
- Lines
- 183
- Domain
- Architecture Layer
- Bucket
- arch/loongarch
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kvm_host.hasm/kvm_csr.hasm/kvm_dmsintc.hasm/kvm_vcpu.h
Detected Declarations
function Copyrightfunction dmsintc_deliver_msi_to_vcpufunction dmsintc_set_irqfunction kvm_dmsintc_ctrl_accessfunction kvm_dmsintc_set_attrfunction kvm_dmsintc_createfunction kvm_dmsintc_destroyfunction kvm_loongarch_register_dmsintc_device
Annotated Snippet
if (is_write) {
if (copy_from_user(&val, data, sizeof(s->msg_addr_base)))
return -EFAULT;
if (s->msg_addr_base)
return -EFAULT; /* Duplicate setting are not allowed. */
if ((val & (BIT(AVEC_CPU_SHIFT) - 1)) != 0)
return -EINVAL;
s->msg_addr_base = val;
cpu_bit = find_first_bit((unsigned long *)&(s->msg_addr_base), 64) - AVEC_CPU_SHIFT;
cpu_bit = min(cpu_bit, AVEC_CPU_BIT);
s->cpu_mask = GENMASK(cpu_bit - 1, 0) & AVEC_CPU_MASK;
}
break;
case KVM_DEV_LOONGARCH_DMSINTC_MSG_ADDR_SIZE:
if (is_write) {
if (copy_from_user(&val, data, sizeof(s->msg_addr_size)))
return -EFAULT;
if (s->msg_addr_size)
return -EFAULT; /*Duplicate setting are not allowed. */
s->msg_addr_size = val;
}
break;
default:
kvm_err("%s: unknown dmsintc register, addr = %d\n", __func__, addr);
return -ENXIO;
}
return 0;
}
static int kvm_dmsintc_set_attr(struct kvm_device *dev,
struct kvm_device_attr *attr)
{
switch (attr->group) {
case KVM_DEV_LOONGARCH_DMSINTC_GRP_CTRL:
return kvm_dmsintc_ctrl_access(dev, attr, true);
default:
kvm_err("%s: unknown group (%d)\n", __func__, attr->group);
return -EINVAL;
}
}
static int kvm_dmsintc_create(struct kvm_device *dev, u32 type)
{
struct kvm *kvm;
struct loongarch_dmsintc *s;
if (!dev) {
kvm_err("%s: kvm_device ptr is invalid!\n", __func__);
return -EINVAL;
}
kvm = dev->kvm;
if (kvm->arch.dmsintc) {
kvm_err("%s: LoongArch DMSINTC has already been created!\n", __func__);
return -EINVAL;
}
s = kzalloc(sizeof(struct loongarch_dmsintc), GFP_KERNEL);
if (!s)
return -ENOMEM;
s->kvm = kvm;
kvm->arch.dmsintc = s;
return 0;
}
static void kvm_dmsintc_destroy(struct kvm_device *dev)
{
if (!dev || !dev->kvm || !dev->kvm->arch.dmsintc)
return;
kfree(dev->kvm->arch.dmsintc);
kfree(dev);
}
static struct kvm_device_ops kvm_dmsintc_dev_ops = {
.name = "kvm-loongarch-dmsintc",
.create = kvm_dmsintc_create,
.destroy = kvm_dmsintc_destroy,
.set_attr = kvm_dmsintc_set_attr,
};
int kvm_loongarch_register_dmsintc_device(void)
{
return kvm_register_device_ops(&kvm_dmsintc_dev_ops, KVM_DEV_TYPE_LOONGARCH_DMSINTC);
}
Annotation
- Immediate include surface: `linux/kvm_host.h`, `asm/kvm_csr.h`, `asm/kvm_dmsintc.h`, `asm/kvm_vcpu.h`.
- Detected declarations: `function Copyright`, `function dmsintc_deliver_msi_to_vcpu`, `function dmsintc_set_irq`, `function kvm_dmsintc_ctrl_access`, `function kvm_dmsintc_set_attr`, `function kvm_dmsintc_create`, `function kvm_dmsintc_destroy`, `function kvm_loongarch_register_dmsintc_device`.
- Atlas domain: Architecture Layer / arch/loongarch.
- Implementation status: source implementation candidate.
- This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.