arch/loongarch/mm/tlb.c
Source file repositories/reference/linux-study-clean/arch/loongarch/mm/tlb.c
File Facts
- System
- Linux kernel
- Corpus path
arch/loongarch/mm/tlb.c- Extension
.c- Size
- 7788 bytes
- Lines
- 323
- Domain
- Architecture Layer
- Bucket
- arch/loongarch
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/init.hlinux/sched.hlinux/smp.hlinux/mm.hlinux/hugetlb.hlinux/export.hasm/bootinfo.hasm/cpu.hasm/exception.hasm/mmu_context.hasm/pgtable.hasm/tlb.h
Detected Declarations
function Copyrightfunction local_flush_tlb_userfunction local_flush_tlb_kernelfunction local_flush_tlb_mmfunction local_flush_tlb_rangefunction local_flush_tlb_kernel_rangefunction local_flush_tlb_pagefunction local_flush_tlb_onefunction __update_hugetlbfunction __update_tlbfunction setup_ptwalkerfunction output_pgtable_bits_definesfunction setup_tlb_handlerfunction tlb_initexport local_flush_tlb_allexport local_flush_tlb_userexport local_flush_tlb_kernel
Annotated Snippet
while (start < end) {
invtlb(INVTLB_ADDR_GFALSE_AND_ASID, asid, start);
start += (PAGE_SIZE << 1);
}
} else {
drop_mmu_context(mm, cpu);
}
local_irq_restore(flags);
} else {
cpumask_clear_cpu(cpu, mm_cpumask(mm));
}
}
void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
{
unsigned long size, flags;
local_irq_save(flags);
size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
size = (size + 1) >> 1;
if (size <= (current_cpu_data.tlbsizestlbsets ?
current_cpu_data.tlbsize / 8 :
current_cpu_data.tlbsize / 2)) {
start &= (PAGE_MASK << 1);
end += ((PAGE_SIZE << 1) - 1);
end &= (PAGE_MASK << 1);
while (start < end) {
invtlb_addr(INVTLB_ADDR_GTRUE_OR_ASID, 0, start);
start += (PAGE_SIZE << 1);
}
} else {
local_flush_tlb_kernel();
}
local_irq_restore(flags);
}
void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
{
int cpu = smp_processor_id();
if (asid_valid(vma->vm_mm, cpu)) {
int newpid;
newpid = cpu_asid(cpu, vma->vm_mm);
page &= (PAGE_MASK << 1);
invtlb(INVTLB_ADDR_GFALSE_AND_ASID, newpid, page);
} else {
cpumask_clear_cpu(cpu, mm_cpumask(vma->vm_mm));
}
}
/*
* This one is only used for pages with the global bit set so we don't care
* much about the ASID.
*/
void local_flush_tlb_one(unsigned long page)
{
page &= (PAGE_MASK << 1);
invtlb_addr(INVTLB_ADDR_GTRUE_OR_ASID, 0, page);
}
static void __update_hugetlb(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
{
#ifdef CONFIG_HUGETLB_PAGE
int idx;
unsigned long lo;
unsigned long flags;
local_irq_save(flags);
address &= (PAGE_MASK << 1);
write_csr_entryhi(address);
tlb_probe();
idx = read_csr_tlbidx();
write_csr_pagesize(PS_HUGE_SIZE);
lo = pmd_to_entrylo(pte_val(*ptep));
write_csr_entrylo0(lo);
write_csr_entrylo1(lo + (HPAGE_SIZE >> 1));
if (idx < 0)
tlb_write_random();
else
tlb_write_indexed();
write_csr_pagesize(PS_DEFAULT_SIZE);
local_irq_restore(flags);
#endif
}
Annotation
- Immediate include surface: `linux/init.h`, `linux/sched.h`, `linux/smp.h`, `linux/mm.h`, `linux/hugetlb.h`, `linux/export.h`, `asm/bootinfo.h`, `asm/cpu.h`.
- Detected declarations: `function Copyright`, `function local_flush_tlb_user`, `function local_flush_tlb_kernel`, `function local_flush_tlb_mm`, `function local_flush_tlb_range`, `function local_flush_tlb_kernel_range`, `function local_flush_tlb_page`, `function local_flush_tlb_one`, `function __update_hugetlb`, `function __update_tlb`.
- Atlas domain: Architecture Layer / arch/loongarch.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.