arch/loongarch/pci/pci.c
Source file repositories/reference/linux-study-clean/arch/loongarch/pci/pci.c
File Facts
- System
- Linux kernel
- Corpus path
arch/loongarch/pci/pci.c- Extension
.c- Size
- 4765 bytes
- Lines
- 185
- Domain
- Architecture Layer
- Bucket
- arch/loongarch
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/init.hlinux/acpi.hlinux/delay.hlinux/types.hlinux/pci.hlinux/vgaarb.hlinux/io-64-nonatomic-lo-hi.hasm/cacheflush.hasm/loongson.h
Detected Declarations
function Copyrightfunction raw_pci_writefunction mcfg_addr_initfunction pcibios_initfunction pcibios_device_addfunction pcibios_alloc_irqfunction pci_fixup_vgadevfunction loongson_gpu_fixup_dma_hangfunction pci_fixup_dma_hang_earlyfunction pci_fixup_dma_hang_finalmodule init pcibios_init
Annotated Snippet
subsys_initcall(pcibios_init);
int pcibios_device_add(struct pci_dev *dev)
{
int id;
struct irq_domain *dom;
id = pci_domain_nr(dev->bus);
dom = irq_find_matching_fwnode(get_pch_msi_handle(id), DOMAIN_BUS_PCI_MSI);
dev_set_msi_domain(&dev->dev, dom);
return 0;
}
int pcibios_alloc_irq(struct pci_dev *dev)
{
if (acpi_disabled)
return 0;
if (pci_dev_msi_enabled(dev))
return 0;
return acpi_pci_irq_enable(dev);
}
static void pci_fixup_vgadev(struct pci_dev *pdev)
{
struct pci_dev *devp = NULL;
while ((devp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, devp))) {
if (devp->vendor != PCI_VENDOR_ID_LOONGSON) {
vga_set_default_device(devp);
dev_info(&pdev->dev,
"Overriding boot device as %X:%X\n",
devp->vendor, devp->device);
}
}
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LOONGSON, PCI_DEVICE_ID_LOONGSON_DC1, pci_fixup_vgadev);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LOONGSON, PCI_DEVICE_ID_LOONGSON_DC2, pci_fixup_vgadev);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LOONGSON, PCI_DEVICE_ID_LOONGSON_DC3, pci_fixup_vgadev);
#define CRTC_NUM_MAX 2
#define CRTC_OUTPUT_ENABLE 0x100
static void loongson_gpu_fixup_dma_hang(struct pci_dev *pdev, bool on)
{
u32 i, val, count, crtc_offset, device;
void __iomem *crtc_reg, *base, *regbase;
static u32 crtc_status[CRTC_NUM_MAX] = { 0 };
base = pdev->bus->ops->map_bus(pdev->bus, pdev->devfn + 1, 0);
device = readw(base + PCI_DEVICE_ID);
regbase = ioremap(readq(base + PCI_BASE_ADDRESS_0) & ~0xffull, SZ_64K);
if (!regbase) {
pci_err(pdev, "Failed to ioremap()\n");
return;
}
switch (device) {
case PCI_DEVICE_ID_LOONGSON_DC2:
crtc_reg = regbase + 0x1240;
crtc_offset = 0x10;
break;
case PCI_DEVICE_ID_LOONGSON_DC3:
crtc_reg = regbase;
crtc_offset = 0x400;
break;
default:
iounmap(regbase);
return;
}
for (i = 0; i < CRTC_NUM_MAX; i++, crtc_reg += crtc_offset) {
val = readl(crtc_reg);
if (!on)
crtc_status[i] = val;
/* No need to fixup if the status is off at startup. */
if (!(crtc_status[i] & CRTC_OUTPUT_ENABLE))
continue;
if (on)
val |= CRTC_OUTPUT_ENABLE;
else
val &= ~CRTC_OUTPUT_ENABLE;
mb();
writel(val, crtc_reg);
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/init.h`, `linux/acpi.h`, `linux/delay.h`, `linux/types.h`, `linux/pci.h`, `linux/vgaarb.h`, `linux/io-64-nonatomic-lo-hi.h`.
- Detected declarations: `function Copyright`, `function raw_pci_write`, `function mcfg_addr_init`, `function pcibios_init`, `function pcibios_device_add`, `function pcibios_alloc_irq`, `function pci_fixup_vgadev`, `function loongson_gpu_fixup_dma_hang`, `function pci_fixup_dma_hang_early`, `function pci_fixup_dma_hang_final`.
- Atlas domain: Architecture Layer / arch/loongarch.
- Implementation status: integration implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.