arch/m68k/coldfire/clk.c
Source file repositories/reference/linux-study-clean/arch/m68k/coldfire/clk.c
File Facts
- System
- Linux kernel
- Corpus path
arch/m68k/coldfire/clk.c- Extension
.c- Size
- 2846 bytes
- Lines
- 145
- Domain
- Architecture Layer
- Bucket
- arch/m68k
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/module.hlinux/platform_device.hlinux/mutex.hlinux/clk.hlinux/io.hlinux/err.hasm/coldfire.hasm/mcfsim.hasm/mcfclk.h
Detected Declarations
function __clk_init_enabledfunction __clk_init_disabledfunction __clk_enable0function __clk_disable0function __clk_enable1function __clk_disable1function clk_enablefunction clk_disablefunction clk_get_ratefunction clk_round_ratefunction clk_set_ratefunction clk_set_parentexport clk_enableexport clk_disableexport clk_get_rateexport clk_round_rateexport clk_set_rateexport clk_set_parentexport clk_get_parent
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/***************************************************************************/
/*
* clk.c -- general ColdFire CPU kernel clk handling
*
* Copyright (C) 2009, Greg Ungerer (gerg@snapgear.com)
*/
/***************************************************************************/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/mutex.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/err.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfclk.h>
static DEFINE_SPINLOCK(clk_lock);
#ifdef MCFPM_PPMCR0
/*
* For more advanced ColdFire parts that have clocks that can be enabled
* we supply enable/disable functions. These must properly define their
* clocks in their platform specific code.
*/
void __clk_init_enabled(struct clk *clk)
{
clk->enabled = 1;
clk->clk_ops->enable(clk);
}
void __clk_init_disabled(struct clk *clk)
{
clk->enabled = 0;
clk->clk_ops->disable(clk);
}
static void __clk_enable0(struct clk *clk)
{
mcf_write8(clk->slot, MCFPM_PPMCR0);
}
static void __clk_disable0(struct clk *clk)
{
mcf_write8(clk->slot, MCFPM_PPMSR0);
}
struct clk_ops clk_ops0 = {
.enable = __clk_enable0,
.disable = __clk_disable0,
};
#ifdef MCFPM_PPMCR1
static void __clk_enable1(struct clk *clk)
{
mcf_write8(clk->slot, MCFPM_PPMCR1);
}
static void __clk_disable1(struct clk *clk)
{
mcf_write8(clk->slot, MCFPM_PPMSR1);
}
struct clk_ops clk_ops1 = {
.enable = __clk_enable1,
.disable = __clk_disable1,
};
#endif /* MCFPM_PPMCR1 */
#endif /* MCFPM_PPMCR0 */
int clk_enable(struct clk *clk)
{
unsigned long flags;
if (!clk)
return 0;
spin_lock_irqsave(&clk_lock, flags);
if ((clk->enabled++ == 0) && clk->clk_ops)
clk->clk_ops->enable(clk);
spin_unlock_irqrestore(&clk_lock, flags);
return 0;
}
EXPORT_SYMBOL(clk_enable);
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/module.h`, `linux/platform_device.h`, `linux/mutex.h`, `linux/clk.h`, `linux/io.h`, `linux/err.h`, `asm/coldfire.h`.
- Detected declarations: `function __clk_init_enabled`, `function __clk_init_disabled`, `function __clk_enable0`, `function __clk_disable0`, `function __clk_enable1`, `function __clk_disable1`, `function clk_enable`, `function clk_disable`, `function clk_get_rate`, `function clk_round_rate`.
- Atlas domain: Architecture Layer / arch/m68k.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.