arch/m68k/fpsp040/bindec.S

Source file repositories/reference/linux-study-clean/arch/m68k/fpsp040/bindec.S

File Facts

System
Linux kernel
Corpus path
arch/m68k/fpsp040/bindec.S
Extension
.S
Size
28114 bytes
Lines
920
Domain
Architecture Layer
Bucket
arch/m68k
Inferred role
Architecture Layer: arch/m68k
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

bfextu	USER_FPCR(%a6){#26:#2},%d1 |get initial rmode bits
	lslw	#1,%d1		|put them in bits 2:1
	addw	%d5,%d1		|add in LAMBDA
	lslw	#1,%d1		|put them in bits 3:1
	tstl	L_SCR2(%a6)	|test sign of original x
	bges	x_pos		|if pos, don't set bit 0
	addql	#1,%d1		|if neg, set bit 0
x_pos:
	leal	RBDTBL,%a2	|load rbdtbl base
	moveb	(%a2,%d1),%d3	|load d3 with new rmode
	lsll	#4,%d3		|put bits in proper position
	fmovel	%d3,%fpcr		|load bits into fpu
	lsrl	#4,%d3		|put bits in proper position
	tstb	%d3		|decode new rmode for pten table
	bnes	not_rn		|if zero, it is RN
	leal	PTENRN,%a1	|load a1 with RN table base
	bras	rmode		|exit decode
not_rn:
	lsrb	#1,%d3		|get lsb in carry
	bccs	not_rp		|if carry clear, it is RM
	leal	PTENRP,%a1	|load a1 with RP table base
	bras	rmode		|exit decode
not_rp:
	leal	PTENRM,%a1	|load a1 with RM table base
rmode:
	clrl	%d3		|clr table index
e_loop:
	lsrl	#1,%d0		|shift next bit into carry
	bccs	e_next		|if zero, skip the mul
	fmulx	(%a1,%d3),%fp1	|mul by 10**(d3_bit_no)
e_next:
	addl	#12,%d3		|inc d3 to next pwrten table entry
	tstl	%d0		|test if ISCALE is zero
	bnes	e_loop		|if not, loop


| A8. Clr INEX; Force RZ.
|     The operation in A3 above may have set INEX2.
|     RZ mode is forced for the scaling operation to insure
|     only one rounding error.  The grs bits are collected in
|     the INEX flag for use in A10.
|
| Register usage:
|	Input/Output

	fmovel	#0,%FPSR		|clr INEX
	fmovel	#rz_mode,%FPCR	|set RZ rounding mode


| A9. Scale X -> Y.
|     The mantissa is scaled to the desired number of significant
|     digits.  The excess digits are collected in INEX2. If mul,
|     Check d2 for excess 10 exponential value.  If not zero,
|     the iscale value would have caused the pwrten calculation
|     to overflow.  Only a negative iscale can cause this, so
|     multiply by 10^(d2), which is now only allowed to be 24,
|     with a multiply by 10^8 and 10^16, which is exact since
|     10^24 is exact.  If the input was denormalized, we must
|     create a busy stack frame with the mul command and the
|     two operands, and allow the fpu to complete the multiply.
|
| Register usage:
|	Input/Output
|	d0: FPCR with RZ mode/Unchanged
|	d2: 0 or 24/unchanged
|	d3: x/x
|	d4: LEN/Unchanged
|	d5: ICTR:LAMBDA
|	d6: ILOG/Unchanged
|	d7: k-factor/Unchanged

Annotation

Implementation Notes