arch/m68k/fpsp040/x_fline.S
Source file repositories/reference/linux-study-clean/arch/m68k/fpsp040/x_fline.S
File Facts
- System
- Linux kernel
- Corpus path
arch/m68k/fpsp040/x_fline.S- Extension
.S- Size
- 2932 bytes
- Lines
- 104
- Domain
- Architecture Layer
- Bucket
- arch/m68k
- Inferred role
- Architecture Layer: arch/m68k
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
fpsp.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
|
| x_fline.sa 3.3 1/10/91
|
| fpsp_fline --- FPSP handler for fline exception
|
| First determine if the exception is one of the unimplemented
| floating point instructions. If so, let fpsp_unimp handle it.
| Next, determine if the instruction is an fmovecr with a non-zero
| <ea> field. If so, handle here and return. Otherwise, it
| must be a real F-line exception.
|
| Copyright (C) Motorola, Inc. 1990
| All Rights Reserved
|
| For details on the license for this file, please see the
| file, README, in this same directory.
X_FLINE: |idnt 2,1 | Motorola 040 Floating Point Software Package
|section 8
#include "fpsp.h"
|xref real_fline
|xref fpsp_unimp
|xref uni_2
|xref mem_read
|xref fpsp_fmt_error
.global fpsp_fline
fpsp_fline:
|
| check for unimplemented vector first. Use EXC_VEC-4 because
| the equate is valid only after a 'link a6' has pushed one more
| long onto the stack.
|
cmpw #UNIMP_VEC,EXC_VEC-4(%a7)
beql fpsp_unimp
|
| fmovecr with non-zero <ea> handling here
|
subl #4,%a7 |4 accounts for 2-word difference
| ;between six word frame (unimp) and
| ;four word frame
link %a6,#-LOCAL_SIZE
fsave -(%a7)
moveml %d0-%d1/%a0-%a1,USER_DA(%a6)
moveal EXC_PC+4(%a6),%a0 |get address of fline instruction
leal L_SCR1(%a6),%a1 |use L_SCR1 as scratch
movel #4,%d0
addl #4,%a6 |to offset the sub.l #4,a7 above so that
| ;a6 can point correctly to the stack frame
| ;before branching to mem_read
bsrl mem_read
subl #4,%a6
movel L_SCR1(%a6),%d0 |d0 contains the fline and command word
bfextu %d0{#4:#3},%d1 |extract coprocessor id
cmpib #1,%d1 |check if cpid=1
bne not_mvcr |exit if not
bfextu %d0{#16:#6},%d1
cmpib #0x17,%d1 |check if it is an FMOVECR encoding
bne not_mvcr
| ;if an FMOVECR instruction, fix stack
| ;and go to FPSP_UNIMP
fix_stack:
cmpib #VER_40,(%a7) |test for orig unimp frame
bnes ck_rev
subl #UNIMP_40_SIZE-4,%a7 |emulate an orig fsave
Annotation
- Immediate include surface: `fpsp.h`.
- Atlas domain: Architecture Layer / arch/m68k.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.