arch/m68k/include/asm/current.h

File Facts

System

Linux kernel

Corpus path

arch/m68k/include/asm/current.h

Extension

.h

Size

640 bytes

Lines

32

Domain

Architecture Layer

Bucket

arch/m68k

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/thread_info.h

Detected Declarations

• struct task_struct

Annotated Snippet

#ifndef _M68K_CURRENT_H
#define _M68K_CURRENT_H

#ifdef CONFIG_MMU

register struct task_struct *current __asm__("%a2");

#else

/*
 *	Rather than dedicate a register (as the m68k source does), we
 *	just keep a global,  we should probably just change it all to be
 *	current and lose _current_task.
 */
#include <linux/thread_info.h>

struct task_struct;

static inline struct task_struct *get_current(void)
{
	return(current_thread_info()->task);
}

#define	current	get_current()

#endif /* CONFIG_MMU */

register unsigned long current_stack_pointer __asm__("sp");

#endif /* !(_M68K_CURRENT_H) */

Annotation

• Immediate include surface: `linux/thread_info.h`.
• Detected declarations: `struct task_struct`.
• Atlas domain: Architecture Layer / arch/m68k.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.