arch/m68k/include/asm/MC68328.h
Source file repositories/reference/linux-study-clean/arch/m68k/include/asm/MC68328.h
File Facts
- System
- Linux kernel
- Corpus path
arch/m68k/include/asm/MC68328.h- Extension
.h- Size
- 38724 bytes
- Lines
- 1269
- Domain
- Architecture Layer
- Bucket
- arch/m68k
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
Dependency Surface
linux/compiler.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#include <linux/compiler.h>
#ifndef _MC68328_H_
#define _MC68328_H_
#define BYTE_REF(addr) (*((volatile unsigned char*)addr))
#define WORD_REF(addr) (*((volatile unsigned short*)addr))
#define LONG_REF(addr) (*((volatile unsigned long*)addr))
#define PUT_FIELD(field, val) (((val) << field##_SHIFT) & field##_MASK)
#define GET_FIELD(reg, field) (((reg) & field##_MASK) >> field##_SHIFT)
/**********
*
* 0xFFFFF0xx -- System Control
*
**********/
/*
* System Control Register (SCR)
*/
#define SCR_ADDR 0xfffff000
#define SCR BYTE_REF(SCR_ADDR)
#define SCR_WDTH8 0x01 /* 8-Bit Width Select */
#define SCR_DMAP 0x04 /* Double Map */
#define SCR_SO 0x08 /* Supervisor Only */
#define SCR_BETEN 0x10 /* Bus-Error Time-Out Enable */
#define SCR_PRV 0x20 /* Privilege Violation */
#define SCR_WPV 0x40 /* Write Protect Violation */
#define SCR_BETO 0x80 /* Bus-Error TimeOut */
/*
* Mask Revision Register
*/
#define MRR_ADDR 0xfffff004
#define MRR LONG_REF(MRR_ADDR)
/**********
*
* 0xFFFFF1xx -- Chip-Select logic
*
**********/
/**********
*
* 0xFFFFF2xx -- Phase Locked Loop (PLL) & Power Control
*
**********/
/*
* Group Base Address Registers
*/
#define GRPBASEA_ADDR 0xfffff100
#define GRPBASEB_ADDR 0xfffff102
#define GRPBASEC_ADDR 0xfffff104
#define GRPBASED_ADDR 0xfffff106
#define GRPBASEA WORD_REF(GRPBASEA_ADDR)
#define GRPBASEB WORD_REF(GRPBASEB_ADDR)
#define GRPBASEC WORD_REF(GRPBASEC_ADDR)
#define GRPBASED WORD_REF(GRPBASED_ADDR)
#define GRPBASE_V 0x0001 /* Valid */
#define GRPBASE_GBA_MASK 0xfff0 /* Group Base Address (bits 31-20) */
/*
* Group Base Address Mask Registers
*/
#define GRPMASKA_ADDR 0xfffff108
#define GRPMASKB_ADDR 0xfffff10a
#define GRPMASKC_ADDR 0xfffff10c
#define GRPMASKD_ADDR 0xfffff10e
#define GRPMASKA WORD_REF(GRPMASKA_ADDR)
#define GRPMASKB WORD_REF(GRPMASKB_ADDR)
#define GRPMASKC WORD_REF(GRPMASKC_ADDR)
#define GRPMASKD WORD_REF(GRPMASKD_ADDR)
#define GRMMASK_GMA_MASK 0xfffff0 /* Group Base Mask (bits 31-20) */
/*
* Chip-Select Option Registers (group A)
*/
#define CSA0_ADDR 0xfffff110
#define CSA1_ADDR 0xfffff114
#define CSA2_ADDR 0xfffff118
#define CSA3_ADDR 0xfffff11c
#define CSA0 LONG_REF(CSA0_ADDR)
Annotation
- Immediate include surface: `linux/compiler.h`.
- Atlas domain: Architecture Layer / arch/m68k.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.