arch/m68k/include/asm/nettel.h
Source file repositories/reference/linux-study-clean/arch/m68k/include/asm/nettel.h
File Facts
- System
- Linux kernel
- Corpus path
arch/m68k/include/asm/nettel.h- Extension
.h- Size
- 3099 bytes
- Lines
- 106
- Domain
- Architecture Layer
- Bucket
- arch/m68k
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/coldfire.hasm/mcfsim.hasm/io.h
Detected Declarations
function mcf_getppdatafunction mcf_setppdatafunction mcf_getppdatafunction mcf_setppdata
Annotated Snippet
#ifndef nettel_h
#define nettel_h
/****************************************************************************/
/****************************************************************************/
#if defined(CONFIG_NETtel) || defined(CONFIG_CLEOPATRA)
/****************************************************************************/
#ifdef CONFIG_COLDFIRE
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/io.h>
#endif
/*---------------------------------------------------------------------------*/
#if defined(CONFIG_M5307) || defined(CONFIG_M5407)
/*
* NETtel/5307 based hardware first. DTR/DCD lines are wired to
* GPIO lines. Most of the LED's are driver through a latch
* connected to CS2.
*/
#define MCFPP_DCD1 0x0001
#define MCFPP_DCD0 0x0002
#define MCFPP_DTR1 0x0004
#define MCFPP_DTR0 0x0008
#define NETtel_LEDADDR 0x30400000
#ifndef __ASSEMBLER__
extern volatile unsigned short ppdata;
/*
* These functions defined to give quasi generic access to the
* PPIO bits used for DTR/DCD.
*/
static __inline__ unsigned int mcf_getppdata(void)
{
volatile unsigned short *pp;
pp = (volatile unsigned short *) MCFSIM_PADAT;
return((unsigned int) *pp);
}
static __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits)
{
volatile unsigned short *pp;
pp = (volatile unsigned short *) MCFSIM_PADAT;
ppdata = (ppdata & ~mask) | bits;
*pp = ppdata;
}
#endif
/*---------------------------------------------------------------------------*/
#elif defined(CONFIG_M5206e)
/*
* NETtel/5206e based hardware has leds on latch on CS3.
* No support modem for lines??
*/
#define NETtel_LEDADDR 0x50000000
/*---------------------------------------------------------------------------*/
#elif defined(CONFIG_M5272)
/*
* NETtel/5272 based hardware. DTR/DCD lines are wired to GPB lines.
*/
#define MCFPP_DCD0 0x0080
#define MCFPP_DCD1 0x0000 /* Port 1 no DCD support */
#define MCFPP_DTR0 0x0040
#define MCFPP_DTR1 0x0000 /* Port 1 no DTR support */
#ifndef __ASSEMBLER__
/*
* These functions defined to give quasi generic access to the
* PPIO bits used for DTR/DCD.
*/
static __inline__ unsigned int mcf_getppdata(void)
{
return mcf_read16(MCFSIM_PBDAT);
}
static __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits)
{
mcf_write16((mcf_read16(MCFSIM_PBDAT) & ~mask) | bits, MCFSIM_PBDAT);
}
#endif
#endif
/*---------------------------------------------------------------------------*/
/****************************************************************************/
Annotation
- Immediate include surface: `asm/coldfire.h`, `asm/mcfsim.h`, `asm/io.h`.
- Detected declarations: `function mcf_getppdata`, `function mcf_setppdata`, `function mcf_getppdata`, `function mcf_setppdata`.
- Atlas domain: Architecture Layer / arch/m68k.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.