arch/m68k/include/asm/raw_io.h
Source file repositories/reference/linux-study-clean/arch/m68k/include/asm/raw_io.h
File Facts
- System
- Linux kernel
- Corpus path
arch/m68k/include/asm/raw_io.h- Extension
.h- Size
- 12104 bytes
- Lines
- 475
- Domain
- Architecture Layer
- Bucket
- arch/m68k
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/byteorder.h
Detected Declarations
function raw_insbfunction raw_outsbfunction raw_inswfunction raw_outswfunction raw_inslfunction raw_outslfunction raw_insw_swapwfunction raw_outsw_swapwfunction raw_rom_insbfunction raw_rom_outsbfunction raw_rom_inswfunction raw_rom_outswfunction raw_rom_insw_swapwfunction raw_rom_outsw_swapw
Annotated Snippet
#ifndef _RAW_IO_H
#define _RAW_IO_H
#ifdef __KERNEL__
#include <asm/byteorder.h>
/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
* two accesses to memory, which may be undesirable for some devices.
*/
#define in_8(addr) \
({ u8 __v = (*(__force const volatile u8 *) (unsigned long)(addr)); __v; })
#define in_be16(addr) \
({ u16 __v = (*(__force const volatile u16 *) (unsigned long)(addr)); __v; })
#define in_be32(addr) \
({ u32 __v = (*(__force const volatile u32 *) (unsigned long)(addr)); __v; })
#define in_le16(addr) \
({ u16 __v = le16_to_cpu(*(__force const volatile __le16 *) (unsigned long)(addr)); __v; })
#define in_le32(addr) \
({ u32 __v = le32_to_cpu(*(__force const volatile __le32 *) (unsigned long)(addr)); __v; })
#define out_8(addr,b) (void)((*(__force volatile u8 *) (unsigned long)(addr)) = (b))
#define out_be16(addr,w) (void)((*(__force volatile u16 *) (unsigned long)(addr)) = (w))
#define out_be32(addr,l) (void)((*(__force volatile u32 *) (unsigned long)(addr)) = (l))
#define out_le16(addr,w) (void)((*(__force volatile __le16 *) (unsigned long)(addr)) = cpu_to_le16(w))
#define out_le32(addr,l) (void)((*(__force volatile __le32 *) (unsigned long)(addr)) = cpu_to_le32(l))
#define raw_inb in_8
#define raw_inw in_be16
#define raw_inl in_be32
#define __raw_readb in_8
#define __raw_readw in_be16
#define __raw_readl in_be32
#define raw_outb(val,port) out_8((port),(val))
#define raw_outw(val,port) out_be16((port),(val))
#define raw_outl(val,port) out_be32((port),(val))
#define __raw_writeb(val,addr) out_8((addr),(val))
#define __raw_writew(val,addr) out_be16((addr),(val))
#define __raw_writel(val,addr) out_be32((addr),(val))
/*
* Atari ROM port (cartridge port) ISA adapter, used for the EtherNEC NE2000
* network card driver.
* The ISA adapter connects address lines A9-A13 to ISA address lines A0-A4,
* and hardwires the rest of the ISA addresses for a base address of 0x300.
*
* Data lines D8-D15 are connected to ISA data lines D0-D7 for reading.
* For writes, address lines A1-A8 are latched to ISA data lines D0-D7
* (meaning the bit pattern on A1-A8 can be read back as byte).
*
* Read and write operations are distinguished by the base address used:
* reads are from the ROM A side range, writes are through the B side range
* addresses (A side base + 0x10000).
*
* Reads and writes are byte only.
*
* 16 bit reads and writes are necessary for the NetUSBee adapter's USB
* chipset - 16 bit words are read straight off the ROM port while 16 bit
* reads are split into two byte writes. The low byte is latched to the
* NetUSBee buffer by a read from the _read_ window (with the data pattern
* asserted as A1-A8 address pattern). The high byte is then written to the
* write range as usual, completing the write cycle.
*/
#if defined(CONFIG_ATARI_ROM_ISA)
#define rom_in_8(addr) \
({ u16 __v = (*(__force const volatile u16 *) (addr)); __v >>= 8; __v; })
#define rom_in_be16(addr) \
({ u16 __v = (*(__force const volatile u16 *) (addr)); __v; })
#define rom_in_le16(addr) \
({ u16 __v = le16_to_cpu(*(__force const volatile u16 *) (addr)); __v; })
#define rom_out_8(addr, b) \
(void)({u8 __maybe_unused __w, __v = (b); u32 _addr = ((u32) (addr)); \
__w = ((*(__force volatile u8 *) ((_addr | 0x10000) + (__v<<1)))); })
#define rom_out_be16(addr, w) \
(void)({u16 __maybe_unused __w, __v = (w); u32 _addr = ((u32) (addr)); \
__w = ((*(__force volatile u16 *) ((_addr & 0xFFFF0000UL) + ((__v & 0xFF)<<1)))); \
__w = ((*(__force volatile u16 *) ((_addr | 0x10000) + ((__v >> 8)<<1)))); })
#define rom_out_le16(addr, w) \
(void)({u16 __maybe_unused __w, __v = (w); u32 _addr = ((u32) (addr)); \
__w = ((*(__force volatile u16 *) ((_addr & 0xFFFF0000UL) + ((__v >> 8)<<1)))); \
__w = ((*(__force volatile u16 *) ((_addr | 0x10000) + ((__v & 0xFF)<<1)))); })
#define raw_rom_inb rom_in_8
#define raw_rom_inw rom_in_be16
#define raw_rom_outb(val, port) rom_out_8((port), (val))
#define raw_rom_outw(val, port) rom_out_be16((port), (val))
Annotation
- Immediate include surface: `asm/byteorder.h`.
- Detected declarations: `function raw_insb`, `function raw_outsb`, `function raw_insw`, `function raw_outsw`, `function raw_insl`, `function raw_outsl`, `function raw_insw_swapw`, `function raw_outsw_swapw`, `function raw_rom_insb`, `function raw_rom_outsb`.
- Atlas domain: Architecture Layer / arch/m68k.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.