arch/microblaze/kernel/hw_exception_handler.S

Source file repositories/reference/linux-study-clean/arch/microblaze/kernel/hw_exception_handler.S

File Facts

System: Linux kernel
Corpus path: arch/microblaze/kernel/hw_exception_handler.S
Extension: .S
Size: 31493 bytes
Lines: 1095
Domain: Architecture Layer
Bucket: arch/microblaze
Inferred role: Architecture Layer: arch/microblaze
Status: atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

asm/exceptions.h
asm/unistd.h
asm/page.h
asm/entry.h
asm/current.h
linux/linkage.h
linux/pgtable.h
asm/mmu.h
asm/signal.h
asm/registers.h
asm/asm-offsets.h

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#include <asm/exceptions.h>
#include <asm/unistd.h>
#include <asm/page.h>

#include <asm/entry.h>
#include <asm/current.h>
#include <linux/linkage.h>
#include <linux/pgtable.h>

#include <asm/mmu.h>
#include <asm/signal.h>
#include <asm/registers.h>
#include <asm/asm-offsets.h>

#undef DEBUG

/* Helpful Macros */
#define NUM_TO_REG(num)		r ## num

	#define RESTORE_STATE			\
		lwi	r5, r1, 0;		\
		mts	rmsr, r5;		\
		nop;				\
		lwi	r3, r1, PT_R3;		\
		lwi	r4, r1, PT_R4;		\
		lwi	r5, r1, PT_R5;		\
		lwi	r6, r1, PT_R6;		\
		lwi	r11, r1, PT_R11;	\
		lwi	r31, r1, PT_R31;	\
		lwi	r1, r1, PT_R1;

#define LWREG_NOP			\
	bri	ex_handler_unhandled;	\
	nop;

#define SWREG_NOP			\
	bri	ex_handler_unhandled;	\
	nop;

/* r3 is the source */
#define R3_TO_LWREG_V(regnum)				\
	swi	r3, r1, 4 * regnum;				\
	bri	ex_handler_done;

/* r3 is the source */
#define R3_TO_LWREG(regnum)				\
	or	NUM_TO_REG (regnum), r0, r3;		\
	bri	ex_handler_done;

/* r3 is the target */
#define SWREG_TO_R3_V(regnum)				\
	lwi	r3, r1, 4 * regnum;				\
	bri	ex_sw_tail;

/* r3 is the target */
#define SWREG_TO_R3(regnum)				\
	or	r3, r0, NUM_TO_REG (regnum);		\
	bri	ex_sw_tail;

	#define R3_TO_LWREG_VM_V(regnum)		\
		brid	ex_lw_end_vm;			\
		swi	r3, r7, 4 * regnum;

	#define R3_TO_LWREG_VM(regnum)			\
		brid	ex_lw_end_vm;			\
		or	NUM_TO_REG (regnum), r0, r3;

	#define SWREG_TO_R3_VM_V(regnum)		\
		brid	ex_sw_tail_vm;			\
		lwi	r3, r7, 4 * regnum;

Annotation

Immediate include surface: `asm/exceptions.h`, `asm/unistd.h`, `asm/page.h`, `asm/entry.h`, `asm/current.h`, `linux/linkage.h`, `linux/pgtable.h`, `asm/mmu.h`.
Atlas domain: Architecture Layer / arch/microblaze.
Implementation status: atlas-only.
This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.