arch/microblaze/lib/cmpdi2.c
Source file repositories/reference/linux-study-clean/arch/microblaze/lib/cmpdi2.c
File Facts
- System
- Linux kernel
- Corpus path
arch/microblaze/lib/cmpdi2.c- Extension
.c- Size
- 470 bytes
- Lines
- 28
- Domain
- Architecture Layer
- Bucket
- arch/microblaze
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
Dependency Surface
linux/export.hlibgcc.h
Detected Declarations
function __cmpdi2export __cmpdi2
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
#include <linux/export.h>
#include "libgcc.h"
word_type __cmpdi2(long long a, long long b)
{
const DWunion au = {
.ll = a
};
const DWunion bu = {
.ll = b
};
if (au.s.high < bu.s.high)
return 0;
else if (au.s.high > bu.s.high)
return 2;
if ((unsigned int) au.s.low < (unsigned int) bu.s.low)
return 0;
else if ((unsigned int) au.s.low > (unsigned int) bu.s.low)
return 2;
return 1;
}
EXPORT_SYMBOL(__cmpdi2);
Annotation
- Immediate include surface: `linux/export.h`, `libgcc.h`.
- Detected declarations: `function __cmpdi2`, `export __cmpdi2`.
- Atlas domain: Architecture Layer / arch/microblaze.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.