arch/mips/alchemy/common/gpiolib.c
Source file repositories/reference/linux-study-clean/arch/mips/alchemy/common/gpiolib.c
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/alchemy/common/gpiolib.c- Extension
.c- Size
- 6541 bytes
- Lines
- 222
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/init.hlinux/kernel.hlinux/property.hlinux/types.hlinux/gpio/driver.hasm/mach-au1x00/gpio-au1000.hasm/mach-au1x00/gpio-au1300.h
Detected Declarations
function gpio2_getfunction gpio2_setfunction gpio2_direction_inputfunction gpio2_direction_outputfunction gpio2_to_irqfunction gpio1_getfunction gpio1_setfunction gpio1_direction_inputfunction gpio1_direction_outputfunction gpio1_to_irqfunction alchemy_gpic_getfunction alchemy_gpic_setfunction alchemy_gpic_dir_inputfunction alchemy_gpic_dir_outputfunction alchemy_gpic_gpio_to_irqfunction alchemy_gpio_nodes_initfunction alchemy_gpiochip_init
Annotated Snippet
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/property.h>
#include <linux/types.h>
#include <linux/gpio/driver.h>
#include <asm/mach-au1x00/gpio-au1000.h>
#include <asm/mach-au1x00/gpio-au1300.h>
static int gpio2_get(struct gpio_chip *chip, unsigned offset)
{
return !!alchemy_gpio2_get_value(offset + ALCHEMY_GPIO2_BASE);
}
static int gpio2_set(struct gpio_chip *chip, unsigned offset, int value)
{
alchemy_gpio2_set_value(offset + ALCHEMY_GPIO2_BASE, value);
return 0;
}
static int gpio2_direction_input(struct gpio_chip *chip, unsigned offset)
{
return alchemy_gpio2_direction_input(offset + ALCHEMY_GPIO2_BASE);
}
static int gpio2_direction_output(struct gpio_chip *chip, unsigned offset,
int value)
{
return alchemy_gpio2_direction_output(offset + ALCHEMY_GPIO2_BASE,
value);
}
static int gpio2_to_irq(struct gpio_chip *chip, unsigned offset)
{
return alchemy_gpio2_to_irq(offset + ALCHEMY_GPIO2_BASE);
}
static int gpio1_get(struct gpio_chip *chip, unsigned offset)
{
return !!alchemy_gpio1_get_value(offset + ALCHEMY_GPIO1_BASE);
}
static int gpio1_set(struct gpio_chip *chip,
unsigned offset, int value)
{
alchemy_gpio1_set_value(offset + ALCHEMY_GPIO1_BASE, value);
return 0;
}
static int gpio1_direction_input(struct gpio_chip *chip, unsigned offset)
{
return alchemy_gpio1_direction_input(offset + ALCHEMY_GPIO1_BASE);
}
static int gpio1_direction_output(struct gpio_chip *chip,
unsigned offset, int value)
{
return alchemy_gpio1_direction_output(offset + ALCHEMY_GPIO1_BASE,
value);
}
static int gpio1_to_irq(struct gpio_chip *chip, unsigned offset)
{
return alchemy_gpio1_to_irq(offset + ALCHEMY_GPIO1_BASE);
}
const struct software_node alchemy_gpio1_node = {
.name = "alchemy-gpio1",
};
const struct software_node alchemy_gpio2_node = {
.name = "alchemy-gpio2",
};
const struct software_node alchemy_gpic_node = {
.name = "alchemy-gpic",
};
static const struct software_node *alchemy_gpio_node_group[] = {
&alchemy_gpio1_node,
&alchemy_gpio2_node,
&alchemy_gpic_node,
NULL
};
static struct gpio_chip alchemy_gpio_chip[] = {
[0] = {
.label = "alchemy-gpio1",
Annotation
- Immediate include surface: `linux/init.h`, `linux/kernel.h`, `linux/property.h`, `linux/types.h`, `linux/gpio/driver.h`, `asm/mach-au1x00/gpio-au1000.h`, `asm/mach-au1x00/gpio-au1300.h`.
- Detected declarations: `function gpio2_get`, `function gpio2_set`, `function gpio2_direction_input`, `function gpio2_direction_output`, `function gpio2_to_irq`, `function gpio1_get`, `function gpio1_set`, `function gpio1_direction_input`, `function gpio1_direction_output`, `function gpio1_to_irq`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.