arch/mips/alchemy/devboards/db1550.c
Source file repositories/reference/linux-study-clean/arch/mips/alchemy/devboards/db1550.c
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/alchemy/devboards/db1550.c- Extension
.c- Size
- 16465 bytes
- Lines
- 632
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/dma-mapping.hlinux/gpio.hlinux/i2c.hlinux/init.hlinux/io.hlinux/interrupt.hlinux/mtd/mtd.hlinux/mtd/platnand.hlinux/platform_device.hlinux/pm.hlinux/spi/spi.hlinux/spi/flash.hasm/bootinfo.hasm/mach-au1x00/au1000.hasm/mach-au1x00/gpio-au1000.hasm/mach-au1x00/au1xxx_eth.hasm/mach-au1x00/au1xxx_dbdma.hasm/mach-au1x00/au1xxx_psc.hasm/mach-au1x00/au1550_spi.hasm/mach-au1x00/au1550nd.hasm/mach-db1x00/bcsr.hprom.hdb1xxx.hplatform.h
Detected Declarations
function db1550_hw_setupfunction db1550_board_setupfunction au1550_nand_cmd_ctrlfunction au1550_nand_device_readyfunction pb1550_nand_setupfunction db1550_spi_cs_enfunction db1550_map_pci_irqfunction pb1550_map_pci_irqfunction db1550_pci_setupfunction db1550_devicesfunction pb1550_devicesfunction db1550_dev_setup
Annotated Snippet
switch (pin) {
case 1: return AU1550_PCI_INTB;
case 2: return AU1550_PCI_INTC;
case 3: return AU1550_PCI_INTD;
case 4: return AU1550_PCI_INTA;
}
}
if (slot == 13) {
switch (pin) {
case 1: return AU1550_PCI_INTA;
case 2: return AU1550_PCI_INTB;
case 3: return AU1550_PCI_INTC;
case 4: return AU1550_PCI_INTD;
}
}
return -1;
}
static int pb1550_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
{
if ((slot < 12) || (slot > 13) || pin == 0)
return -1;
if (slot == 12) {
switch (pin) {
case 1: return AU1500_PCI_INTB;
case 2: return AU1500_PCI_INTC;
case 3: return AU1500_PCI_INTD;
case 4: return AU1500_PCI_INTA;
}
}
if (slot == 13) {
switch (pin) {
case 1: return AU1500_PCI_INTA;
case 2: return AU1500_PCI_INTB;
case 3: return AU1500_PCI_INTC;
case 4: return AU1500_PCI_INTD;
}
}
return -1;
}
static struct resource alchemy_pci_host_res[] = {
[0] = {
.start = AU1500_PCI_PHYS_ADDR,
.end = AU1500_PCI_PHYS_ADDR + 0xfff,
.flags = IORESOURCE_MEM,
},
};
static struct alchemy_pci_platdata db1550_pci_pd = {
.board_map_irq = db1550_map_pci_irq,
};
static struct platform_device db1550_pci_host_dev = {
.dev.platform_data = &db1550_pci_pd,
.name = "alchemy-pci",
.id = 0,
.num_resources = ARRAY_SIZE(alchemy_pci_host_res),
.resource = alchemy_pci_host_res,
};
/**********************************************************************/
static struct platform_device *db1550_devs[] __initdata = {
&db1550_i2c_dev,
&db1550_ac97_dev,
&db1550_spi_dev,
&db1550_i2s_dev,
&db1550_stac_dev,
&db1550_ac97dma_dev,
&db1550_i2sdma_dev,
&db1550_sndac97_dev,
&db1550_sndi2s_dev,
};
/* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */
int __init db1550_pci_setup(int id)
{
if (id)
db1550_pci_pd.board_map_irq = pb1550_map_pci_irq;
return platform_device_register(&db1550_pci_host_dev);
}
static void __init db1550_devices(void)
{
alchemy_gpio_direction_output(203, 0); /* red led on */
irq_set_irq_type(AU1550_GPIO0_INT, IRQ_TYPE_EDGE_BOTH); /* CD0# */
irq_set_irq_type(AU1550_GPIO1_INT, IRQ_TYPE_EDGE_BOTH); /* CD1# */
irq_set_irq_type(AU1550_GPIO3_INT, IRQ_TYPE_LEVEL_LOW); /* CARD0# */
Annotation
- Immediate include surface: `linux/clk.h`, `linux/dma-mapping.h`, `linux/gpio.h`, `linux/i2c.h`, `linux/init.h`, `linux/io.h`, `linux/interrupt.h`, `linux/mtd/mtd.h`.
- Detected declarations: `function db1550_hw_setup`, `function db1550_board_setup`, `function au1550_nand_cmd_ctrl`, `function au1550_nand_device_ready`, `function pb1550_nand_setup`, `function db1550_spi_cs_en`, `function db1550_map_pci_irq`, `function pb1550_map_pci_irq`, `function db1550_pci_setup`, `function db1550_devices`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.