arch/mips/bmips/dma.c
Source file repositories/reference/linux-study-clean/arch/mips/bmips/dma.c
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/bmips/dma.c- Extension
.c- Size
- 626 bytes
- Lines
- 28
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
linux/types.hlinux/dma-map-ops.hasm/bmips.hasm/io.h
Detected Declarations
function arch_sync_dma_for_cpu_all
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
#include <linux/types.h>
#include <linux/dma-map-ops.h>
#include <asm/bmips.h>
#include <asm/io.h>
bool bmips_rac_flush_disable;
void arch_sync_dma_for_cpu_all(void)
{
void __iomem *cbr = bmips_cbr_addr;
u32 cfg;
if (boot_cpu_type() != CPU_BMIPS3300 &&
boot_cpu_type() != CPU_BMIPS4350 &&
boot_cpu_type() != CPU_BMIPS4380)
return;
if (unlikely(bmips_rac_flush_disable))
return;
/* Flush stale data out of the readahead cache */
cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
__raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG);
__raw_readl(cbr + BMIPS_RAC_CONFIG);
}
Annotation
- Immediate include surface: `linux/types.h`, `linux/dma-map-ops.h`, `asm/bmips.h`, `asm/io.h`.
- Detected declarations: `function arch_sync_dma_for_cpu_all`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.