arch/mips/boot/dts/econet/en751221.dtsi

Source file repositories/reference/linux-study-clean/arch/mips/boot/dts/econet/en751221.dtsi

File Facts

System
Linux kernel
Corpus path
arch/mips/boot/dts/econet/en751221.dtsi
Extension
.dtsi
Size
4134 bytes
Lines
182
Domain
Architecture Layer
Bucket
arch/mips
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/dts-v1/;

#include <dt-bindings/clock/econet,en751221-scu.h>

/ {
	compatible = "econet,en751221";
	#address-cells = <1>;
	#size-cells = <1>;

	hpt_clock: clock {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <200000000>;  /* 200 MHz */
	};

	cpus: cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "mips,mips34Kc";
			reg = <0>;
		};
	};

	cpuintc: interrupt-controller {
		compatible = "mti,cpu-interrupt-controller";
		interrupt-controller;
		#address-cells = <0>;
		#interrupt-cells = <1>;
	};

	chip_scu: syscon@1fa20000 {
		compatible = "econet,en751221-chip-scu", "syscon";
		reg = <0x1fa20000 0x388>;
	};

	pcie_phy1: pcie-phy@1fac0000 {
		compatible = "econet,en751221-pcie-gen2";
		reg = <0x1fac0000 0x1000>;
		#phy-cells = <0>;
	};

	pcie_phy0: pcie-phy@1faf2000 {
		compatible = "econet,en751221-pcie-gen1";
		reg = <0x1faf2000 0x1000>;
		#phy-cells = <0>;
	};

	scuclk: clock-controller@1fb00000 {
		compatible = "econet,en751221-scu";
		reg = <0x1fb00000 0x970>;
		#clock-cells = <1>;
		#reset-cells = <1>;
	};

	intc: interrupt-controller@1fb40000 {
		compatible = "econet,en751221-intc";
		reg = <0x1fb40000 0x100>;
		interrupt-parent = <&cpuintc>;
		interrupts = <2>;

		interrupt-controller;
		#interrupt-cells = <1>;
		econet,shadow-interrupts = <7 2>, <8 3>, <13 12>, <30 29>;
	};

	pciecfg: pciecfg@1fb80000 {

Annotation

Implementation Notes